Method for fabricating a concave bottom oxide in a trench
    92.
    发明授权
    Method for fabricating a concave bottom oxide in a trench 有权
    在沟槽中制造凹底氧化物的方法

    公开(公告)号:US06265269B1

    公开(公告)日:2001-07-24

    申请号:US09369266

    申请日:1999-08-06

    IPC分类号: H01L21336

    CPC分类号: H01L29/42368 H01L29/7813

    摘要: A method for forming a concave bottom oxide layer in a trench, comprising: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a silicon nitride layer on the pad oxide layer; etching the silicon nitride layer, the pad oxide layer and the semiconductor substrate to form the trench in the semiconductor substrate; depositing a silicon oxide layer to refill into the trench and cover on the silicon nitride layer, wherein the silicon oxide layer has overhang portions at corners of the trench; anisotropically etching the silicon oxide layer to form a concave bottom oxide layer in the trench; etching the silicon oxide layer to remove the silicon oxide layer on the silicon nitride layer and the sidewalls of the trench; removing the silicon nitride layer and the pad oxide layer.

    摘要翻译: 一种在沟槽中形成凹底部氧化物层的方法,包括:提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成氮化硅层; 蚀刻氮化硅层,焊盘氧化物层和半导体衬底,以在半导体衬底中形成沟槽; 沉积硅氧化物层以重新填充到沟槽中并覆盖在氮化硅层上,其中氧化硅层在沟槽的拐角处具有突出部分; 各向异性地蚀刻氧化硅层以在沟槽中形成凹的底部氧化物层; 蚀刻氧化硅层以除去氮化硅层和沟槽的侧壁上的氧化硅层; 去除氮化硅层和衬垫氧化物层。

    Method of removing polysilicon residual in a LOCOS isolation process using an etching selectivity solution
    93.
    发明授权
    Method of removing polysilicon residual in a LOCOS isolation process using an etching selectivity solution 有权
    使用蚀刻选择性溶液在LOCOS分离工艺中去除多晶硅残留的方法

    公开(公告)号:US06245643B1

    公开(公告)日:2001-06-12

    申请号:US09304013

    申请日:1999-04-30

    IPC分类号: H01L2176

    CPC分类号: H01L21/76205

    摘要: A method of forming a field oxide isolation region includes: forming a first pad oxide layer over a semiconductor substrate; forming a silicon nitride layer over the first pad oxide layer; patterning and etching the silicon nitride layer and the first pad oxide layer to expose a portion of the substrate, and simultaneously forming an undercut cavity; forming a second pad oxide layer over the exposed portion of the substrate; depositing a layer of polysilicon over the second pad oxide layer, the polysilicon layer filling the undercut cavity to form a polysilicon plug; removing portions of the polysilicon layer to form a polysilicon spacer; thermally oxidizing the substrate to substantially consume the polysilicon spacer but leave a polysilicon residual of the polysilicon plug, the thermal oxidation forming a thick oxide above the exposed portion of the substrate; substantially removing the silicon nitride layer; applying a first etching solution to the first pad oxide layer and the polysilicon residual, the first etching solution providing selective etching of the first pad oxide layer and the polysilicon residual so that the polysilicon residual is substantially removed and the first pad oxide layer is partially removed leaving a first pad oxide layer residual; and applying a second etching solution to remove the first pad oxide layer residual, thereby leaving the thick oxide to form the isolation region.

    摘要翻译: 形成场氧化物隔离区域的方法包括:在半导体衬底上形成第一衬垫氧化层; 在所述第一衬垫氧化物层上形成氮化硅层; 图案化和蚀刻氮化硅层和第一衬垫氧化物层以暴露衬底的一部分,同时形成底切腔; 在衬底的暴露部分上形成第二焊盘氧化物层; 在所述第二衬垫氧化物层上沉积多晶硅层,所述多晶硅层填充所述底切腔以形成多晶硅插塞; 去除所述多晶硅层的部分以形成多晶硅间隔物; 热氧化衬底以基本上消耗多晶硅间隔物,但留下多晶硅插塞的多晶硅残留物,热氧化在衬底的暴露部分上形成厚氧化物; 基本上除去氮化硅层; 将第一蚀刻溶液施加到第一焊盘氧化物层和多晶硅残余物,第一蚀刻溶液提供对第一焊盘氧化物层和多晶硅残余物的选择性蚀刻,使得基本上去除多晶硅残余物并且部分地去除第一焊盘氧化物层 留下第一垫氧化层残留; 以及施加第二蚀刻溶液以去除所述第一衬垫氧化物层残留物,从而留下所述厚氧化物以形成所述隔离区域。

    Method of preventing micro-scratches on the surface of a semiconductor wafer when performing a CMP process
    94.
    发明授权
    Method of preventing micro-scratches on the surface of a semiconductor wafer when performing a CMP process 有权
    当执行CMP处理时,防止半导体晶片的表面上的微划痕的方法

    公开(公告)号:US06242352B1

    公开(公告)日:2001-06-05

    申请号:US09264013

    申请日:1999-02-08

    IPC分类号: H01L21302

    摘要: The present invention relates to a method for removing a first dielectric layer of a semiconductor wafer. The first dielectric layer is formed on the surface of a second dielectric layer of the semiconductor wafer. The method comprises performing a chemical mechanical polishing (CMP) process on the first dielectric layer to remove a predetermined thickness of the first dielectric layer, measuring the remaining thickness of the first dielectric layer, providing an etching table having a plurality of thickness ranges of the remaining first dielectric layer and corresponding etching back procedure or parameters of each of the thickness ranges, and performing an etching back process to horizontally remove the remaining first dielectric layer according to the etching back procedure or parameters of the thickness range corresponding to the measured thickness of the remaining first dielectric layer.

    摘要翻译: 本发明涉及一种去除半导体晶片的第一介质层的方法。 第一电介质层形成在半导体晶片的第二电介质层的表面上。 该方法包括在第一电介质层上进行化学机械抛光(CMP)处理以去除第一介电层的预定厚度,测量第一电介质层的剩余厚度,提供具有多个厚度范围的蚀刻台 剩余的第一介电层和相应的回蚀程序或每个厚度范围的参数,并且根据蚀刻回程或对应于测量厚度的厚度范围的参数执行蚀刻回加工以水平去除剩余的第一介电层 剩余的第一介电层。

    Exhaust line of chemical-mechanical polisher
    95.
    发明授权
    Exhaust line of chemical-mechanical polisher 失效
    化学机械抛光机排气管

    公开(公告)号:US06139680A

    公开(公告)日:2000-10-31

    申请号:US212371

    申请日:1998-12-15

    CPC分类号: B24B55/12 B01D46/00 B24B37/04

    摘要: An improved exhaust line of a chemical-mechanical polisher will improve polishing performance. A chemical-mechanical polisher is in a polishing chamber, wherein the chemical-mechanical polisher contains a polishing table, a plurality of polishing pads on the polishing table, and a plurality of outlets on the polishing table. A plurality of exhaust lines is connected with the plurality of the outlets, wherein the exhaust lines are used to drive out exhaust gas and sewage generated in the polishing chamber. At least a gas-liquid separating device is connected with the plurality of the exhaust lines, wherein the gas-liquid separating device is used for separation of the exhaust and the sewage. The gas-liquid separating device comprises a sewage collector, a filter, a pump, and a sewage-collecting device. The sewage collector is connected with the plurality of the outlets, wherein the sewage collector is used for collecting the exhaust gas and the sewage driven out through the plurality of outlets. The filter is connected with the top of the gas-liquid separating device. The pump is connected with the filter. The sewage-collecting device is connected with the bottom of the gas-liquid separating device, wherein the sewage-collecting device is used for collecting the sewage.

    摘要翻译: 化学机械抛光机的改进的排气管线将提高抛光性能。 化学机械抛光机在抛光室中,其中化学机械抛光机包含抛光台,抛光台上的多个抛光垫和抛光台上的多个出口。 多个排气管路与多个出口连接,其中排气管线用于驱除在抛光室中产生的废气和污水。 至少一个气液分离装置与多个排气管连接,其中气液分离装置用于分离废气和污水。 气液分离装置包括污水收集器,过滤器,泵和污水收集装置。 污水收集器与多个出口连接,其中污水收集器用于收集废气,并通过多个出口排出污水。 过滤器与气液分离装置的顶部连接。 泵与过滤器连接。 污水收集装置与气液分离装置的底部连接,其中污水收集装置用于收集污水。

    Method and apparatus for finding the location of a pointing instrument
on a tablet
    96.
    发明授权
    Method and apparatus for finding the location of a pointing instrument on a tablet 失效
    用于在平板电脑上找到指示仪器的位置的方法和装置

    公开(公告)号:US5428192A

    公开(公告)日:1995-06-27

    申请号:US060013

    申请日:1993-05-10

    IPC分类号: G06F3/033 G06F3/046 G08C21/00

    CPC分类号: G06F3/046

    摘要: A method and apparatus for producing a digital number representing the location of a pointing instrument with respect to a plurality of spaced conductors is disclosed. The instrument has a coil unit which produces an alternating magnetic field for inducing a plurality of alternating current signals in the plurality of spaced conductors, respectively, when an alternating current electrical signal is applied thereto. The conductors are sampled in a predetermined order so as to sense the induced alternating current signals. A phase sensitive detector is employed to detect a phase reversal between the induced alternating current signals induced in ones of the conductors located on opposite sides of the coil to produce a signal waveform which changes polarity in response to the phase reversal. A position counter is then incremented at a predetermined rate upon detection of the phase reversal until sampling of a succeeding one of the conductors which immediately follows the detection of the phase reversal is to be initiated. A processor deducts a digital number in the position counter from a digital number corresponding to a predetermined distance of the succeeding one of the conductors from a marginal one of the conductors in order to determine the location of the pointing instrument.

    摘要翻译: 公开了一种用于产生表示指向仪器相对于多个间隔导体的位置的数字数字的方法和装置。 该仪器具有一个线圈单元,当线圈单元向其施加交流电信号时,该线圈单元分别产生交变磁场,用于分别在多个间隔导体中感应多个交流信号。 以预定的顺序对导体进行采样,以感测感应的交流信号。 使用相敏检测器来检测在位于线圈的相对侧的导体中感应的感应交流信号之间的相位反转,以产生响应于相位反转而改变极性的信号波形。 然后,在检测到相位反转之后,位置计数器以预定的速率增加,直到开始对紧接在相位反转检测之后的后续的一个导体的采样。 处理器从与导体中的下一个导体的预定距离对应的数字编号从位置计数器中扣除数字数字,以便确定指示仪的位置。

    Electrochemical paper towel sterilizing device

    公开(公告)号:US10814023B2

    公开(公告)日:2020-10-27

    申请号:US16143480

    申请日:2018-09-27

    申请人: Chien-Hung Chen

    发明人: Chien-Hung Chen

    摘要: The present invention is related to an electrochemical paper towel sterilizing device, which mainly comprises: at least one sterilizing device, at least one first accommodating space, at least one water-inlet portion, at least one electrolytic component, at least one power-supply element, and at least one second accommodating space. In this way, the second accommodating space is provided with a dry wiping-object (such as a paper towel), and the user can add water into the first accommodating space via the water-inlet portion and electrolyze the water through the electrolytic component to generate the high active oxygen species, and combine the water and the high active oxygen species into the wiping-object, thereby producing a wet wiping-object with sterilizing effect.

    Flip-flop circuit, frequency divider and frequency dividing method
    98.
    发明授权
    Flip-flop circuit, frequency divider and frequency dividing method 有权
    触发电路,分频器和分频方式

    公开(公告)号:US08643408B2

    公开(公告)日:2014-02-04

    申请号:US13569568

    申请日:2012-08-08

    IPC分类号: H03K21/00 H03B19/00

    CPC分类号: H03K3/0375

    摘要: In response to a first level of the clock signal, an inverting output of a flip-flop circuit is connected, via a non-inverting input thereof, to a first intermediate node of the flip-flop circuit and a non-inverting output of the flip-flop circuit is connected, via an inverting input thereof, to a second intermediate node of the flip-flop circuit. In response to a second level of the clock signal, the first intermediate node is connected, via a third intermediate node of the flip-flop circuit, to the non-inverting output and the second intermediate node is connected, via a fourth intermediate node of the flip-flop circuit, to the inverting output. A first cross-coupled gates arrangement of the flip-flop circuit is coupled between the first and second intermediate nodes. A second cross-coupled gates arrangement of the flip-flop circuit is coupled between the third and fourth intermediate nodes.

    摘要翻译: 响应于第一级时钟信号,触发器电路的反相输出经由其非反相输入连接到触发器电路的第一中间节点,并且该反相输出端 触发器电路经由其反相输入连接到触发器电路的第二中间节点。 响应于时钟信号的第二电平,第一中间节点经由触发器电路的第三中间节点连接到非反相输出端,并且第二中间节点经由第四中间节点 触发器电路,到反相输出。 触发器电路的第一交叉耦合门装置耦合在第一和第二中间节点之间。 触发器电路的第二交叉耦合栅极布置耦合在第三和第四中间节点之间。

    Non-volatile memory and manufacturing method thereof
    99.
    发明授权
    Non-volatile memory and manufacturing method thereof 有权
    非易失性存储器及其制造方法

    公开(公告)号:US08471328B2

    公开(公告)日:2013-06-25

    申请号:US12843093

    申请日:2010-07-26

    IPC分类号: H01L29/82

    摘要: A manufacturing method of a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate conductive layer, the substrate and the gate dielectric layer, and a cavity is formed on end sides of the gate dielectric layer. A first oxide layer is formed on a sidewall and bottom of the gate conductive layer, and a second oxide layer is formed on a surface of the substrate. A nitride material layer is formed covering the gate structure, the first and second oxide layer and the substrate and filling the opening. An etching process is performed to partly remove the nitride material layer, thereby a nitride layer is formed on a sidewall of the gate conductive layer and extending into the opening.

    摘要翻译: 公开了一种非易失性存储器的制造方法。 栅极结构形成在衬底上,并且包括栅极介电层和栅极导电层。 部分地去除栅介质层,从而在栅极导电层,基板和栅极电介质层之间形成对称的开口,并且在栅极电介质层的端侧形成空腔。 在栅极导电层的侧壁和底部上形成第一氧化物层,并且在衬底的表面上形成第二氧化物层。 形成覆盖栅极结构,第一和第二氧化物层和衬底并填充开口的氮化物材料层。 执行蚀刻处理以部分地去除氮化物材料层,由此在栅极导电层的侧壁上形成并延伸到开口中的氮化物层。

    Method for driving LCD panel and LCD using the same
    100.
    发明授权
    Method for driving LCD panel and LCD using the same 有权
    使用该方法驱动LCD面板和LCD

    公开(公告)号:US08384645B2

    公开(公告)日:2013-02-26

    申请号:US12129633

    申请日:2008-05-29

    IPC分类号: G09G3/36

    摘要: A method for driving an LCD panel and an LCD using the same are provided. The method includes following steps. Firstly, a number of scan signals are provided sequentially, and an enabling time of the scan signals excluding the last scan signal is adjusted according to a compensation time, so as to unfix the enabling time of these scan signals. Next, the scan signals having the unfixed enabling time are sequentially provided to an LCD panel, so as to turn on a number of row pixels of the LCD panel one by one. Thereby, the entire brightness of the LCD can be uniformed by applying the method disclosed in the present invention.

    摘要翻译: 提供了一种用于驱动LCD面板的方法和使用其的LCD。 该方法包括以下步骤。 首先,依次提供多个扫描信号,并且根据补偿时间来调整除了最后扫描信号之外的扫描信号的使能时间,以便解除这些扫描信号的使能时间。 接下来,将具有不固定使能时间的扫描信号依次提供给LCD面板,以逐个打开LCD面板的行像素数。 因此,通过应用本发明公开的方法,可以使LCD的整个亮度均匀。