METHOD FOR MAKING A PHOTOVOLTAIC CELL COMPRISING CONTACT REGIONS DOPED THROUGH A LAMINA
    91.
    发明申请
    METHOD FOR MAKING A PHOTOVOLTAIC CELL COMPRISING CONTACT REGIONS DOPED THROUGH A LAMINA 有权
    用于制造包含通过层间结合的接触区域的光伏电池的方法

    公开(公告)号:US20100159630A1

    公开(公告)日:2010-06-24

    申请号:US12339032

    申请日:2008-12-18

    IPC分类号: H01L21/18

    摘要: In aspects of the present invention, a method is disclosed to form a lamina having opposing first and second surfaces. Heavily doped contact regions extend from the first surface to the second surface. Generally the lamina is formed by affixing a semiconductor donor body to a receiver element, then cleaving the lamina from the semiconductor donor body wherein the lamina remains affixed to the receiver element. In the present invention, the heavily doped contact regions are formed by doping the semiconductor donor body before cleaving of the lamina. A photovoltaic cell comprising the lamina is then fabricated. By forming the heavily doped contact regions before bonding to the receiver element and cleaving, post-bonding high-temperature steps can be avoided, which may be advantageous.

    摘要翻译: 在本发明的方面,公开了一种形成具有相对的第一和第二表面的薄片的方法。 重掺杂的接触区域从第一表面延伸到第二表面。 通常,通过将半导体施主体附着到接收器元件,然后从半导体施主体分离薄层而形成薄片,其中薄片保持固定在接收器元件上。 在本发明中,重掺杂的接触区域通过在切割层之前掺杂半导体施主体形成。 然后制造包括层板的光伏电池。 通过在接合元件接合之前形成重掺杂的接触区域并且断开,可以避免后接合高温步骤,这可能是有利的。

    PHOTOVOLTAIC CELL COMPRISING CCONTACT REGIONS DOPED THROUGH LAMINA
    92.
    发明申请
    PHOTOVOLTAIC CELL COMPRISING CCONTACT REGIONS DOPED THROUGH LAMINA 失效
    包含通过LAMINA的CCONTACT区域的光电池

    公开(公告)号:US20100154873A1

    公开(公告)日:2010-06-24

    申请号:US12339038

    申请日:2008-12-18

    IPC分类号: H01L31/00

    摘要: In aspects of the present invention, a lamina is formed having opposing first and second surfaces. Heavily doped contact regions extend from the first surface to the second surface. Generally the lamina is formed by affixing a semiconductor donor body to a receiver element, then cleaving the lamina from the semiconductor donor body wherein the lamina remains affixed to the receiver element. In the present invention, the heavily doped contact regions are formed by doping the semiconductor donor body before cleaving of the lamina. A photovoltaic cell comprising the lamina is then fabricated. By forming the heavily doped contact regions before bonding to the receiver element and cleaving, post-bonding high-temperature steps can be avoided, which may be advantageous.

    摘要翻译: 在本发明的方面中,形成具有相对的第一和第二表面的层。 重掺杂的接触区域从第一表面延伸到第二表面。 通常,通过将半导体施主体附着到接收器元件,然后从半导体施主体分离薄层而形成薄片,其中薄片保持固定在接收器元件上。 在本发明中,重掺杂的接触区域通过在切割层之前掺杂半导体施主体形成。 然后制造包括层板的光伏电池。 通过在接合元件接合之前形成重掺杂的接触区域并且断开,可以避免后接合高温步骤,这可能是有利的。

    METHOD FOR FORMING POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS
    96.
    发明申请
    METHOD FOR FORMING POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS 有权
    形成多晶薄膜双极晶体管的方法

    公开(公告)号:US20080311722A1

    公开(公告)日:2008-12-18

    申请号:US11763876

    申请日:2007-06-15

    IPC分类号: H01L21/331

    摘要: A method is described for forming a semiconductor device comprising a bipolar transistor having a base region, an emitter region and a collector region, wherein the base region comprises polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide. The emitter region and collector region also may be formed from polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide forming metal. The polycrystalline semiconductor material is preferably silicided polysilicon, which is formed in contact with C49 phase titanium silicide.

    摘要翻译: 描述了一种用于形成半导体器件的方法,该半导体器件包括具有基极区域,发射极区域和集电极区域的双极晶体管,其中,所述基极区域包括通过使硅,锗或硅锗与硅化物,锗化锗接触而形成的多晶半导体材料 或锗化锗。 发射极区域和集电极区域也可以由通过使硅,锗或硅锗与硅化物,锗化锗或锗化锗形成金属接触而形成的多晶半导体材料形成。 多晶半导体材料优选为与C49相钛硅化物接触形成的硅化多晶硅。

    POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS
    97.
    发明申请
    POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS 有权
    多晶薄膜双极晶体管

    公开(公告)号:US20080308903A1

    公开(公告)日:2008-12-18

    申请号:US11763816

    申请日:2007-06-15

    IPC分类号: H01L27/082 H01L31/112

    摘要: A semiconductor device comprising a bipolar transistor having a base region, an emitter region and a collector region, wherein the base region comprises polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide is described. The emitter region and collector region also may comprise polycrystalline semiconductor material formed by crystallizing silicon, germanium or silicon germanium in contact with a silicide, germanide or silicide germanide forming metal. The polycrystalline semiconductor material is preferably silicided polysilicon, which is formed in contact with C49 phase titanium silicide.

    摘要翻译: 一种半导体器件,包括具有基极区域,发射极区域和集电极区域的双极晶体管,其中所述基极区域包括通过使与硅化物,锗化物或硅化物锗化物接触的硅,锗或锗锗结晶而形成的多晶半导体材料。 发射极区域和集电极区域还可以包括通过使硅,锗或锗锗与硅化物,锗化锗或锗化锗形成金属接触而形成的多晶半导体材料。 多晶半导体材料优选为与C49相钛硅化物接触形成的硅化多晶硅。

    EMBEDDED MEMORY IN A CMOS CIRCUIT AND METHODS OF FORMING THE SAME
    98.
    发明申请
    EMBEDDED MEMORY IN A CMOS CIRCUIT AND METHODS OF FORMING THE SAME 有权
    CMOS电路中的嵌入式存储器及其形成方法

    公开(公告)号:US20080179685A1

    公开(公告)日:2008-07-31

    申请号:US11669850

    申请日:2007-01-31

    IPC分类号: H01L29/76

    摘要: In some aspects, a memory circuit is provided that includes (1) a two-terminal memory element formed on a substrate; and (2) a CMOS transistor formed on the substrate and adapted to program the two-terminal memory element. The two-terminal memory element is formed between a gate layer and a first metal layer of the memory circuit. Numerous other aspects are provided.

    摘要翻译: 在一些方面,提供一种存储器电路,其包括(1)形成在衬底上的两端存储元件; 和(2)形成在所述衬底上并适于编程所述两端存储元件的CMOS晶体管。 两端存储元件形成在存储电路的栅极层和第一金属层之间。 提供了许多其他方面。

    Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide
    99.
    发明授权
    Semiconductor device including junction diode contacting contact-antifuse unit comprising silicide 有权
    包括结二极管接触的半导体器件接触 - 反熔丝单元包括硅化物

    公开(公告)号:US06946719B2

    公开(公告)日:2005-09-20

    申请号:US10728230

    申请日:2003-12-03

    摘要: The invention provides for a vertically oriented junction diode having a contact-antifuse unit in contact with one of its electrodes. The contact-antifuse unit is formed either above or below the junction diode, and comprises a silicide with a dielectric antifuse layer formed on and in contact with it. In preferred embodiments, the silicide is cobalt silicide, and the antifuse preferably silicon oxide, silicon nitride, or silicon oxynitride grown on the colbalt silicide. The junction diode and contact-antifuse unit can be used as a memory cell, which is advantageously used in a monolithic three dimensional memory array.

    摘要翻译: 本发明提供了一种垂直取向的结二极管,其具有与其电极之一接触的接触 - 反熔丝单元。 接触 - 反熔丝单元形成在结二极管上方或下方,并且包括形成在其上并与其接触的介电反熔丝层的硅化物。 在优选的实施方案中,硅化物是硅化钴,反熔丝优选在硅化钴上生长的氧化硅,氮化硅或氮氧化硅。 结二极管和接触 - 反熔丝单元可用作存储单元,其有利地用于单片三维存储器阵列中。