公开(公告)号：US07639820B2

公开(公告)日：2009-12-29

申请号：US11222124

申请日：2005-09-08

申请人： Shinichi Saito

发明人： Shinichi Saito

IPC分类号： H04K1/00 ,  H04L9/00 ,  G06F7/04

CPC分类号： H04K1/00 ,  H04L9/006 ,  H04L9/3263

摘要： An image forming apparatus has a micropattern reading unit, an encoded image generating unit and a code printing control unit. The micropattern reading unit reads a micropattern of a sheet. The encoded image generating unit generates an encoded image. The encoded image has the micropattern and a private key of a user. The code printing control unit prints the encoded image on the sheet to produce a certificate sheet.

摘要翻译： 图像形成装置具有微图案读取单元，编码图像生成单元和代码打印控制单元。 微图案读取单元读取纸张的微图案。 编码图像生成单元生成编码图像。 编码图像具有微图案和用户的私钥。 代码打印控制单元将编码图像打印在纸张上以产生证书表。

公开(公告)号：US20090263078A1

公开(公告)日：2009-10-22

申请号：US12385736

申请日：2009-04-17

申请人： Kazuhiko Hosomi ,  Toshiki Sugawara ,  Yasunobu Matsuoka ,  Hideo Arimoto ,  Shinichi Saito

发明人： Kazuhiko Hosomi ,  Toshiki Sugawara ,  Yasunobu Matsuoka ,  Hideo Arimoto ,  Shinichi Saito

IPC分类号： G02B6/12

CPC分类号： G02B6/12004 ,  G02B6/12007 ,  G02F1/025 ,  G02F2001/0152 ,  G02F2202/105 ,  G02F2203/15

摘要： Plural p-n junctions are formed in a waveguide such that they have junction interfaces in a normal direction to a surface of a substrate (to an extending direction of the substrate). Accordingly, a doping concentration changes in only a horizontal direction in the substrate, and it is possible to fabricate using the same processes as those for silicon electronic devices and to perform device fabricating at a low cost. Moreover, two or more junction interfaces are formed in the waveguide and thus an occupied area of the waveguide in a refractive index modulation region expands. Therefore, the efficiency of the refractive index modulation can be improved and a low-voltage operation is possible.

摘要翻译： 在波导中形成多个p-n结，使得它们在与基板的表面（基板的延伸方向）的法线方向上具有接合界面。 因此，衬底中的掺杂浓度仅在水平方向上发生变化，并且可以使用与硅电子器件相同的工艺来制造，并以低成本执行器件制造。 此外，在波导中形成两个以上的接合界面，因此折射率调制区域中波导的占用面积扩大。 因此，可以提高折射率调制的效率，并且可以进行低电压操作。

公开(公告)号：US07575952B2

公开(公告)日：2009-08-18

申请号：US11797419

申请日：2007-05-03

申请人： Tadashi Arai ,  Shinichi Saito

发明人： Tadashi Arai ,  Shinichi Saito

IPC分类号： H01L51/40

CPC分类号： H01L51/102 ,  B82Y30/00 ,  H01L51/0015 ,  H01L51/0023 ,  H01L51/0545

摘要： A method of manufacturing a semiconductor device having an organic semiconductor film comprises a step of preparing a transparent substrate at least having an opaque gate electrode and a gate insulator thereover, a step of forming a layer containing metal-nano-particles as a conductive layer for a source electrode and a drain electrode to the thus prepared transparent substrate, a step of applying exposure to the transparent substrate on the side of a surface not mounted with the opaque gate electrode, a step of flushing away a portion other than the source electrode and the drain electrode in the layer containing the metal-nano-particles after the exposure, and a step of forming an organic semiconductor layer forming a channel portion. Lower and upper electrodes are positioned in self-alignment manner and thus no positional displacement occurs even if a printing method is used. Accordingly, semiconductor devices such as flexible substrates using an organic semiconductor can be manufactured inexpensively by using a printing method.

摘要翻译： 制造具有有机半导体膜的半导体器件的方法包括制备至少具有不透明栅电极和栅极绝缘体的透明基板的步骤，形成包含金属纳米颗粒的层作为导电层的步骤 源极电极和漏电极，对未形成的不透光栅电极的表面侧的透明基板进行曝光，除去源电极以外的部分的工序;以及 在曝光后含有金属 - 纳米粒子的层中的漏电极，以及形成形成沟道部分的有机半导体层的工序。 下电极和上电极以自对准方式定位，因此即使使用打印方法也不会发生位置偏移。 因此，可以通过使用印刷方法廉价地制造诸如使用有机半导体的柔性基板的半导体器件。

公开(公告)号：US20090132974A1

公开(公告)日：2009-05-21

申请号：US12024107

申请日：2008-01-31

申请人： Hiroyuki YOSHIMOTO ,  Nobuyuki Sugii ,  Shinichi Saito ,  Digh Hisamoto

发明人： Hiroyuki YOSHIMOTO ,  Nobuyuki Sugii ,  Shinichi Saito ,  Digh Hisamoto

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： Capacity-gate voltage characteristics of a field-effect transistor having plural gates are measured against a voltage change in each one of the gates for an inverted MOSFET and for an accumulated MOSFET, respectively. These measurements together with numerical simulations provided from a model for quantum effects are used to determine flat band voltages between the plural gates and a channel. Next, an effective normal electric field is calculated as a vector line integral by using a set of flat band voltages for the measured capacity as a lower integration limit. Lastly, mobility depending on the effective normal electric field is calculated from current-gate voltage characteristic measurements and capacity measurements in a source-drain path, and the calculated mobility is substituted into an equation for a current-voltage curve between source and drain.

摘要翻译： 针对反向MOSFET的栅极和积累的MOSFET中的每一个的电压变化分别测量具有多个栅极的场效应晶体管的容量栅极电压特性。 这些测量结果与从量子效应模型提供的数值模拟一起用于确定多个门和通道之间的平带电压。 接下来，通过使用一组用于测量容量的平带电压作为下积分极限，计算有效正常电场作为矢量线积分。 最后，根据源极 - 漏极路径中的电流 - 栅极电压特性测量和电容测量值计算出有效正常电场的迁移率，并将计算的迁移率代入源极和漏极之间的电流 - 电压曲线的方程式。

公开(公告)号：US07432216B2

公开(公告)日：2008-10-07

申请号：US11503935

申请日：2006-08-15

申请人： Yasuhiro Shimamoto ,  Shinichi Saito ,  Shimpei Tsujikawa

发明人： Yasuhiro Shimamoto ,  Shinichi Saito ,  Shimpei Tsujikawa

IPC分类号： H01L21/31 ,  H01L21/8238 ,  H01L21/336 ,  H01L29/06

CPC分类号： H01L21/28202 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/6659

摘要： The technique capable of reducing the power consumption in the MISFET by suppressing the scattering of the carriers due to the fixed charges is provided. A silicon oxynitride film with a physical thickness of 1.5 nm or more and the relative dielectric constant of 4.1 or higher is formed at the interface between a semiconductor substrate and an alumina film. By so doing, a gate insulator composed of the silicon oxynitride film and the alumina film is constituted. The silicon oxynitride film is formed by performing a thermal treatment of a silicon oxide film formed on the semiconductor substrate in a NO or N2O atmosphere. In this manner, the fixed charges in the silicon oxynitride film are set to 5×1012 cm−2 or less, and the fixed charges in the interface between the silicon oxynitride film and the alumina film are set to 5×1012 cm−2 or more.

摘要翻译： 提供了能够通过抑制由于固定电荷引起的载流子散射来降低MISFET中的功耗的技术。 在半导体基板和氧化铝膜之间的界面处形成物理厚度为1.5nm以上，相对介电常数为4.1以上的氮氧化硅膜。 由此构成由氧氮化硅膜和氧化铝膜构成的栅极绝缘体。 氮氧化硅膜是通过在NO或N 2 O气氛中进行在半导体衬底上形成的氧化硅膜的热处理而形成的。 以这种方式，将氧氮化硅膜中的固定电荷设定为5×10 12 -2 -2或更小，并且在氮氧化硅膜和 氧化铝膜设定为5×10 12 cm -2以上。

公开(公告)号：US20080063761A1

公开(公告)日：2008-03-13

申请号：US11573377

申请日：2005-08-05

申请人： Shinichi Saito

发明人： Shinichi Saito

IPC分类号： A23L1/275

CPC分类号： A23B7/04 ,  A21D2/36 ,  A21D13/04 ,  A21D13/047 ,  A21D13/30 ,  A21D13/40 ,  A21D13/80 ,  A23L5/41 ,  A23L7/10 ,  A23L19/01 ,  A23V2002/00 ,  A23V2250/2106

摘要： An object of the present invention is to provide a processed flour food which is excellent in safety and cost respects and which contains added bilberries capable of stably coloring the processed flour food bluish purple, and a method of coloring the food. The present invention is directed to a processed flour food containing added bilberries, to which bilberries are added in an amount of 5% to 30% with respect to a weight of all materials to color the processed flour food bluish purple, and as a method of coloring a processed flour food containing added bilberries, the method being characterized by comprising: a harvesting step of freezing picked bilberries and then removing foreign matters therefrom; a processing step of crushing the frozen bilberries after the harvesting step and adding an aroma and sugar to the bilberries to mix them; a storing step of sterilizing each constant amount of the packed bilberries after the processing step and passing the bilberries through a metal detector to store the frozen bilberries; and a using step of thawing the bilberries after the storing step to blend the bilberries with the processed flour food.

摘要翻译： 本发明的目的是提供一种加工面粉食品，其安全性和成本方面优异，并且含有能够稳定着色加工面粉食品蓝紫色的添加的越桔，以及对食品着色的方法。 本发明涉及含有加入的越桔的加工面粉食品，相对于所有材料的重量，加入百份比为5％至30％的越桔以使加工的面粉食品蓝紫色着色，并且作为 对含有加入的越桔的加工面粉食品着色，其特征在于包括：收获步骤，冷冻所选的越桔，然后从其中除去异物; 在收获步骤之后破碎冷冻的越桔的加工步骤，并将香料和糖添加到越桔混合; 存储步骤，在处理步骤之后对每个恒定量的包装的越桔进行灭菌，并使越桔通过金属检测器以存储冷冻的越桔; 以及在所述储存步骤之后解冻所述越桔与所述加工的面粉食品混合的使用步骤。

公开(公告)号：US20070259478A1

公开(公告)日：2007-11-08

申请号：US11797419

申请日：2007-05-03

申请人： Tadashi Arai ,  Shinichi Saito

发明人： Tadashi Arai ,  Shinichi Saito

IPC分类号： H01L51/40

CPC分类号： H01L51/102 ,  B82Y30/00 ,  H01L51/0015 ,  H01L51/0023 ,  H01L51/0545

摘要： A method of manufacturing a semiconductor device having an organic semiconductor film comprises a step of preparing a transparent substrate at least having an opaque gate electrode and a gate insulator thereover, a step of forming a layer containing metal-nano-particles as a conductive layer for a source electrode and a drain electrode to the thus prepared transparent substrate, a step of applying exposure to the transparent substrate on the side of a surface not mounted with the opaque gate electrode, a step of flushing away a portion other than the source electrode and the drain electrode in the layer containing the metal-nano-particles after the exposure, and a step of forming an organic semiconductor layer forming a channel portion. Lower and upper electrodes are positioned in self-alignment manner and thus no positional displacement occurs even if a printing method is used. Accordingly, semiconductor devices such as flexible substrates using an organic semiconductor can be manufactured inexpensively by using a printing method.

公开(公告)号：US20070227935A1

公开(公告)日：2007-10-04

申请号：US11729330

申请日：2007-03-28

申请人： Shinichi Saito

发明人： Shinichi Saito

IPC分类号： B65D81/02

CPC分类号： B65D81/057 ,  B65D2585/6835

摘要： A rectangular parallelepiped apparatus set is stored in a hollow rectangular parallelepiped outer casing and is held so as not to be in contact with the outer casing via cushioning body disposed at each of the four corners of the apparatus set. An instruction manual is accommodated in a clearance space between the apparatus set and the outer casing by the cushioning body. The cushioning body is divided into two pairs of cushioning body elements arranged in a first direction parallel to a longitudinal direction of the apparatus set. At least one of the cushioning body elements is formed with a concave portion by extending a distance of the cushioning body elements from the apparatus set in the first direction at both ends of the cushioning body elements in a second direction perpendicular to the first direction so as to accommodate the instruction manual therein.

摘要翻译： 长方体平行六面体装置被储存在中空的长方体状外壳中，并且通过设置在该装置的四个角部的每个角部的缓冲体而被保持为不与外壳接触。 使用说明书通过缓冲体容纳在设备组和外壳之间的间隙空间中。 缓冲体被分成沿着与设备组的纵向方向平行的第一方向布置的两对缓冲体元件。 缓冲体元件中的至少一个通过沿着与第一方向垂直的第二方向从缓冲体元件的两端沿着第一方向设置的装置延伸距离而形成有凹部，以便 以容纳其中的说明手册。

公开(公告)号：US07109072B2

公开(公告)日：2006-09-19

申请号：US11072414

申请日：2005-03-07

申请人： Shinichi Saito ,  Tadashi Arai ,  Seong-Kee Park ,  Toshiyuki Mine

发明人： Shinichi Saito ,  Tadashi Arai ,  Seong-Kee Park ,  Toshiyuki Mine

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L29/42392 ,  B82Y10/00 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78696 ,  Y10S977/723 ,  Y10S977/762 ,  Y10S977/932 ,  Y10S977/937

摘要： The silicon wires formed around metal particles by crystal growth have the problem of metal pollution. For its solution, in the present invention, a silicon bridge is formed through standard silicon processes such as the lithography and the wet etching using hydrofluoric acid performed to an SOI substrate. Thereafter, a thermal oxide film is desirably formed at a high temperature to form a high-quality gate insulating film. It is also desirable to form a coaxial gate electrode. Then, after burying the bridge sections of the silicon bridge in a resist film, the silicon on the bridge girders is removed, and thereafter, the silicon wires buried in the resist film are collected. In this manner, the silicon wires can be collected without dispersing into the hydrofluoric acid solution. Then, a transistor using the silicon wires as a channel is formed.

摘要翻译： 通过晶体生长在金属颗粒周围形成的硅线具有金属污染的问题。 对于其解决方案，在本发明中，通过使用对SOI衬底执行的氢氟酸的光刻和湿蚀刻的标准硅工艺形成硅桥。 此后，期望在高温下形成热氧化膜以形成高质量的栅极绝缘膜。 还希望形成同轴栅电极。 然后，在将硅桥的桥接部分埋入抗蚀剂膜中之后，除去桥梁上的硅，然后收集埋在抗蚀剂膜中的硅线。 以这种方式，可以收集硅线而不会分散到氢氟酸溶液中。 然后，形成使用硅线作为沟道的晶体管。

公开(公告)号：US20060088960A1

公开(公告)日：2006-04-27

申请号：US11072414

申请日：2005-03-07

申请人： Shinichi Saito ,  Tadashi Arai ,  Seong-Kee Park ,  Toshiyuki Mine

发明人： Shinichi Saito ,  Tadashi Arai ,  Seong-Kee Park ,  Toshiyuki Mine

IPC分类号： H01L21/84 ,  H01L21/302

CPC分类号： H01L29/42392 ,  B82Y10/00 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78696 ,  Y10S977/723 ,  Y10S977/762 ,  Y10S977/932 ,  Y10S977/937

摘要： The silicon wires formed around metal particles by crystal growth have the problem of metal pollution. For its solution, in the present invention, a silicon bridge is formed through standard silicon processes such as the lithography and the wet etching using hydrofluoric acid performed to an SOI substrate. Thereafter, a thermal oxide film is desirably formed at a high temperature to form a high-quality gate insulating film. It is also desirable to form a coaxial gate electrode. Then, after burying the bridge sections of the silicon bridge in a resist film, the silicon on the bridge girders is removed, and thereafter, the silicon wires buried in the resist film are collected. In this manner, the silicon wires can be collected without dispersing into the hydrofluoric acid solution. Then, a transistor using the silicon wires as a channel is formed.