公开(公告)号：US20160062744A1

公开(公告)日：2016-03-03

申请号：US14836453

申请日：2015-08-26

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Michael MAIR

IPC: G06F9/44

CPC classification number: G06F8/34 ,  G06F8/70

Abstract: A computer-implemented method for generating control unit program code. The control unit program code or an intermediate representation in the generation of the control unit program code is generated from at least one first data object with at least one first software tool. The first software tool outputs at least one message about the generation process during the generation of the control unit program code or the intermediate representation, and a computer-implemented message management environment acquires the message output by the software tool. The evaluation of the messages output by the software tools during the generation process is achieved in a more effective manner in that a qualification for the acquired message at least as open or approved is acquired by the message management environment and in that a qualification precondition for a message qualified as approved is also acquired by the message management environment.

Abstract translation: 一种用于产生控制单元程序代码的计算机实现的方法。 控制单元程序代码或生成控制单元程序代码中的中间表示是从具有至少一个第一软件工具的至少一个第一数据对象生成的。 第一软件工具在生成控制单元程序代码或中间表示期间输出关于生成过程的至少一个消息，并且计算机实现的消息管理环境获取由软件工具输出的消息。 在生成过程中由软件工具输出的消息的评估以更有效的方式实现，因为获取的消息的资格至少被打开或者被批准是由消息管理环境获取的，并且其中的资格前提条件是 消息管理环境也获得了批准的消息。

公开(公告)号：US09250873B2

公开(公告)日：2016-02-02

申请号：US14024206

申请日：2013-09-11

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Karsten Fischer ,  Torsten Pietzsch ,  Michael Mair ,  Wolfgang Trautmann

IPC: G06F9/45 ,  G06F9/44 ,  G05B19/042

CPC classification number: G06F8/41 ,  G05B19/0426 ,  G06F8/34 ,  G06F8/35

Abstract: A method for the computer-aided generation of at least one part of an executable control program, particularly a measuring, control, regulating, and/or calibration program, for controlling a control system having at least one electronic processor unit is provided. The functionality of the control program is described at least partially in at least one graphical model and the graphical model is divided in hierarchical levels into submodels. A submodel can be divided nested into submodels of a lower hierarchical level, whereby values for options for the compiling of the graphical model to program code are preset and program code is generated from the model co-compiled to the executable control program. Values for options for the compiling of the graphical model to program code and to the executable control program can be preset thereby granularly with the automatic avoidance of conflicting presettings of values for these options.

Abstract translation: 提供了一种用于计算机辅助生成用于控制具有至少一个电子处理器单元的控制系统的可执行控制程序，特别是测量，控制，调节和/或校准程序的至少一部分的方法。 控制程序的功能至少部分地描述在至少一个图形模型中，并且图形模型被分层为子模型。 子模型可以被分成嵌套到较低层级的子模型，由此将用于将图形模型编译为程序代码的选项的值预先设置，并且从共同编译的模型生成程序代码到可执行控制程序。 可以将图形模型编译为程序代码和可执行控制程序的选项的值预先设置，从而通过自动避免这些选项的冲突预设值来进行细微预设。

公开(公告)号：US20150347669A1

公开(公告)日：2015-12-03

申请号：US14823197

申请日：2015-08-11

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Heiko KALTE ,  Lukas FUNKE

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G06F17/5027 ,  G06F17/5054

Abstract: A method for changing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration with at least one signal value onto the FPGA, running the FPGA hardware configuration on the FPGA, setting the signal value for transfer to the FPGA, determining writeback data from the signal value, writing the writeback data as status data to a configuration memory of the FPGA, and transferring the status data from the configuration memory to the functional level of the FPGA. A method is also provided for performing an FPGA build, including the steps of creating an FPGA hardware configuration with a plurality of signal values, arranging signal values in adjacent areas of the FPGA hardware configuration, ascertaining memory locations of a configuration memory for status data of the plurality of signal values on the basis of the FPGA hardware configuration, and creating a list containing signal values.

Abstract translation: 一种在运行时改变FPGA信号值的方法，包括将具有至少一个信号值的FPGA硬件配置加载到FPGA上的步骤，在FPGA上运行FPGA硬件配置，设置传输到FPGA的信号值 从信号值确定回写数据，将写回数据作为状态数据写入FPGA的配置存储器，并将状态数据从配置存储器传送到FPGA的功能级别。 还提供了一种用于执行FPGA构建的方法，包括以下步骤：创建具有多个信号值的FPGA硬件配置，在FPGA硬件配置的相邻区域中布置信号值，确定用于状态数据的配置存储器的存储器位置 基于FPGA硬件配置的多个信号值，并创建包含信号值的列表。

公开(公告)号：US20150324105A1

公开(公告)日：2015-11-12

申请号：US14702805

申请日：2015-05-04

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Sebastian SCHULTE

IPC: G06F3/0484 ,  G06F3/0482 ,  G06F17/30

CPC classification number: G06F3/04847 ,  G05B19/0426 ,  G05B2219/23067 ,  G06F3/0482 ,  G06F3/04842 ,  G06F17/30312

Abstract: A method and data processing system for linking a plurality of data structures of a data processing system with a plurality of elements of a man-machine interface (MMI) are provided. The method includes the steps: provision of an MMI with a plurality of elements, arranging a plurality of data structures in a list, selection of an element of the MMI by a user, automatic linking of a first data structure from the list with the selected element of the MMI, and setting the beginning of the list to the data structure that follows the previously linked data structure in the list. The steps of selection of an element of the MMI by a user, automatic linking of a first data structure from the list with the selected element of the MMI, and setting the beginning of the list to the data structure are carried out repeatedly.

Abstract translation: 提供了一种用于将数据处理系统的多个数据结构与人机界面（MMI）的多个元素相链接的方法和数据处理系统。 该方法包括以下步骤：提供具有多个元素的MMI，在列表中排列多个数据结构，由用户选择MMI的元素，将列表中的第一数据结构与所选择的自动链接 元素，并将列表的开头设置为列表中先前链接的数据结构之后的数据结构。 由用户选择MMI的元素，从列表中自动链接第一数据结构与MMI的所选元素以及将列表的开头设置为数据结构的步骤被重复执行。

公开(公告)号：US09160338B2

公开(公告)日：2015-10-13

申请号：US14275284

申请日：2014-05-12

Applicant: dSPACE digital signal processing and control engineering GmbH

Inventor： Dirk Hasse ,  Robert Polnau

IPC: H03K19/173 ,  H03K19/177 ,  G06F7/38 ,  H03K19/0175 ,  G06F13/42

CPC classification number: H03K19/017509 ,  G06F13/4291 ,  H03K19/0175 ,  H03K19/17732 ,  H03K19/17744

Abstract: A method for implementing an adaptive interface between at least one FPGA with at least one FPGA application and at least one I/O module, which are designed as the corresponding sender side or receiver side, for connection to the FPGA, whereby a serial interface is formed between the at least one FPGA and the at least one I/O module, comprising the steps of configuring a maximum number of registers to be transmitted for each FPGA application, configuring a shared, fixed register width for all registers, setting an enable signal on the sender side for the registers to be transmitted out of the maximum number of registers to be transmitted, transmitting the enable signal from the sender side to the receiver side, and transmitting the registers, for which the enable signal is set, from the sender side to the receiver side.

Abstract translation: 一种在至少一个FPGA与至少一个FPGA应用之间实现自适应接口的方法和被设计为相应的发送机侧或接收机侧的至少一个I / O模块，用于连接到FPGA，由此串行接口是 形成在所述至少一个FPGA和所述至少一个I / O模块之间，包括以下步骤：配置要针对每个FPGA应用发送的最大寄存器数量，为所有寄存器配置共享固定寄存器宽度，设置使能信号 在发送侧，要发送的寄存器的最大数量的寄存器发送，将发送端发送到接收端，并从发送方发送启用信号的寄存器 侧到接收机侧。

公开(公告)号：US08791710B2

公开(公告)日：2014-07-29

申请号：US13293225

申请日：2011-11-10

Applicant: Joerg Bracker ,  Jens Driessen

Inventor： Joerg Bracker ,  Jens Driessen

IPC: G01R31/00

CPC classification number: H01M10/42 ,  G01R31/36

Abstract: A battery emulation device for simulating a battery cell voltage at a terminal of a battery control unit in accordance with a setpoint value includes a control unit configured to determine the setpoint value and provide the determined setpoint value via a galvanically isolated interface; and at least one emulation channel, each including: a voltage source; an amplifier unit; connection lines for connecting the emulation channel; measurement lines; and a fault simulation device configured to simulate fault states.

Abstract translation: 一种电池仿真装置，用于根据设定点值模拟电池控制单元的端子处的电池单体电压包括：控制单元，被配置为确定设定点值，并通过电隔离接口提供确定的设定点值; 和至少一个仿真通道，每个仿真通道包括：电压源; 放大器单元; 用于连接仿真通道的连接线; 测量线 以及配置成模拟故障状态的故障模拟装置。

公开(公告)号：US08768675B2

公开(公告)日：2014-07-01

申请号：US12089470

申请日：2006-10-06

Applicant: Joerg Bracker ,  Marc Dolle

Inventor： Joerg Bracker ,  Marc Dolle

IPC: G06F17/50

CPC classification number: G05F1/625 ,  G05B17/02

Abstract: A method for simulating an effect of at least one electrical/electronic load includes: providing a controllable power supply unit that is connected to at least one terminal of a control unit; and simulating a first current theoretically flowing through a simulated load at the at least one terminal by drawing a second current from the control unit by the controllable power supply unit or impressing a third current on the control unit by the controllable power supply unit.

Abstract translation: 用于模拟至少一个电/电负载的效果的方法包括：提供连接到控制单元的至少一个终端的可控电源单元; 以及通过由所述可控电源单元从所述控制单元抽出第二电流或通过所述可控电源单元在所述控制单元上施加第三电流来模拟理论上流过所述至少一个端子处的模拟负载的第一电流。

公开(公告)号：US08754663B2

公开(公告)日：2014-06-17

申请号：US13054594

申请日：2009-07-15

Applicant: Thomas Schulte ,  Joerg Bracker

Inventor： Thomas Schulte ,  Joerg Bracker

IPC: G01R31/00 ,  G01R31/02 ,  G01R31/327 ,  G05B1/03 ,  H02M1/00

CPC classification number: G01R31/02 ,  G01R31/2848 ,  G01R31/327 ,  G05B1/03 ,  G05B17/02 ,  H02M1/00

Abstract: A circuit for simulating an electrical load at a terminal of a test circuit having at least one first switch and at least one second switch includes a third switch connected to the first switch of the test circuit via a first external connection point. A fourth switch is connected to the second switch of the test circuit via a second external connection point. The first switch and the second switch are connected via a shared, first internal connection point to the terminal of the test circuit and the third switch and the fourth switch are connected via a shared, second internal connection point such that that the first switch, the second switch, the third switch and the fourth switch form an H-bridge circuit. A voltage source is configured to provide the first and second external connection points with a supply voltage. A controllable voltage source is connected in a transverse bridge branch between the terminal and the second internal connection point. An inductance is active in the transverse bridge branch. A current-control unit is operable on the controllable voltage source so as to adjust, to a predetermined setpoint current, an actual current flowing over the terminal of the test circuit and over the transverse bridge branch.

Abstract translation: 用于模拟具有至少一个第一开关和至少一个第二开关的测试电路的端子处的电负载的电路包括经由第一外部连接点连接到测试电路的第一开关的第三开关。 第四开关经由第二外部连接点连接到测试电路的第二开关。 第一开关和第二开关经由共享的第一内部连接点连接到测试电路的端子，并且第三开关和第四开关经由共享的第二内部连接点连接，使得第一开关 第二开关，第三开关和第四开关构成H桥电路。 电压源被配置为向第一和第二外部连接点提供电源电压。 可控电压源连接在端子和第二内部连接点之间的横向桥接支路中。 电桥在横桥支路中有效。 电流控制单元可操作在可控电压源上，以便将预定的设定点电流调节到在测试电路的端子上以及横向桥接支路上流动的实际电流。

公开(公告)号：US08645918B2

公开(公告)日：2014-02-04

申请号：US10598946

申请日：2005-03-15

Applicant: Robert Leinfellner ,  Ortwin Ludger Franzen ,  Hans-Guenter Limberg ,  Marc Dressler ,  Paul Gruber

Inventor： Robert Leinfellner ,  Ortwin Ludger Franzen ,  Hans-Guenter Limberg ,  Marc Dressler ,  Paul Gruber

IPC: G06F9/44

CPC classification number: G05B19/0423 ,  G05B2219/21109 ,  G05B2219/23334 ,  G06F11/3648 ,  G06F11/3656

Abstract: An adjustment device for adjusting at least one control device with at least one control device microcontroller and with at least one control device debug interface, where the adjustment device comprises at least one programmable unit, at least one data transmission interface for connecting the adjustment device to an operating unit, and at least one adjustment device debug interface for connecting the adjustment device to the control device debug interface of the control device. The adjustment device according to the invention accomplishes the objective of reducing the load on the control device due to control device application by at least one address list and at least one data list, which are provided in a memory of the adjustment device.

Abstract translation: 一种调节装置，用于利用至少一个控制装置微控制器和至少一个控制装置调试接口来调整至少一个控制装置，其中调节装置包括至少一个可编程单元，至少一个数据传输接口，用于将调节装置连接到 操作单元和至少一个调整装置调试接口，用于将调节装置连接到控制装置的控制装置调试接口。 根据本发明的调节装置实现了通过由调节装置的存储器中提供的至少一个地址列表和至少一个数据列表的控制装置应用来减小控制装置上的负载的目的。

公开(公告)号：US08555405B2

公开(公告)日：2013-10-08

申请号：US12035301

申请日：2008-02-21

Applicant: Alexander Jeschke ,  Ulrich Louis

Inventor： Alexander Jeschke ,  Ulrich Louis

IPC: G06F7/04 ,  G06F17/30 ,  H04N7/16 ,  H04L29/06

CPC classification number: G06F21/10 ,  H04L9/32 ,  H04L2209/16 ,  H04L2209/603

Abstract: A method is provided for the authorization management of digital contents between at least one owner of authorizations with a first electronic work environment and at least one user of the contents with a second electronic work environment. The owner of the authorizations provides the digital contents to the user of the contents by means of the first electronic work environment at a defined scope of authorizations and the user of the contents is entitled to use the provided digital contents on the second electronic work environment only at the defined scope of authorization. The digital contents are encoded with encryption, the encoded contents are exchanged between the first electronic work environment and the second electronic work environment and the encoded contents are subsequently decoded by means of decryption pertaining to the digital contents.

Abstract translation: 提供了一种用于在具有第一电子工作环境的授权的至少一个所有者和具有第二电子工作环境的内容的至少一个用户之间的数字内容的授权管理的方法。 授权的所有者通过在限定的授权范围内的第一电子工作环境向内容的用户提供数字内容，并且内容的用户有权仅在第二电子工作环境上使用所提供的数字内容 在规定的授权范围内。 数字内容通过加密进行编码，编码内容在第一电子作业环境和第二电子作业环境之间进行交换，随后通过与数字内容相关的解密来解码编码的内容。