公开(公告)号：US07940127B2

公开(公告)日：2011-05-10

申请号：US12330100

申请日：2008-12-08

Applicant: Huan-Ke Chiu ,  Chun-Jen Chen

Inventor： Huan-Ke Chiu ,  Chun-Jen Chen

IPC: H03L7/085

CPC classification number: H03L7/107 ,  H03L7/0991 ,  H03L7/10 ,  H03L7/1806 ,  H03L2207/50

Abstract: An all digital phase lock loop is disclosed, including a digitally controlled oscillator, a phase detector, and a loop filter. The digitally controlled oscillator is controlled by an oscillator tuning word to generate a variable signal. The oscillator tuning word includes a first tuning word and a second tuning word, where the frequency range of the digitally controlled oscillator, capable to be adjusted by the second tuning word, is broader than that capable to be adjusted by the first tuning word. The phase detector detects a phase error between the variable signal and a reference signal. The phase error is received by the loop filter to output the oscillator tuning word. The loop filter has several stages of the low pass filters and a modification circuit. The modification circuit detects two filter outputs from two low pass filters among the filters and accordingly adjusts the second tuning word.

Abstract translation: 公开了一种全数字锁相环，包括数字控制振荡器，相位检测器和环路滤波器。 数字控制振荡器由振荡器调谐字控制，以产生可变信号。 振荡器调谐字包括第一调谐字和第二调谐字，其中能够由第二调谐字调节的数字控制振荡器的频率范围比能够被第一调谐字调整的频率范围宽。 相位检测器检测可变信号和参考信号之间的相位误差。 相位误差由环路滤波器接收以输出振荡器调谐字。 环路滤波器具有几级低通滤波器和修改电路。 修改电路检测滤波器中的两个低通滤波器的两个滤波器输​​出，并相应地调整第二个调谐字。

公开(公告)号：US20100321910A1

公开(公告)日：2010-12-23

申请号：US12497709

申请日：2009-07-06

Applicant: SHOU-KUO HSU ,  CHUN-JEN CHEN

Inventor： SHOU-KUO HSU ,  CHUN-JEN CHEN

IPC: H05K7/00

CPC classification number: H05K1/0231 ,  H05K1/0253 ,  H05K1/112 ,  H05K3/429 ,  H05K2201/0969 ,  H05K2201/10545 ,  H05K2201/10689

Abstract: A printed circuit board includes a first signal layer, a first reference layer, a second reference layer, and a second signal layer. An integrated circuit mounted on the first signal layer includes a power supply terminal connected to a first power supply via. The second signal layer includes a filter and a power supply wire. The filter includes a power terminal connected to the first power supply via, and a ground terminal connected to the second reference layer. The first power supply via is connected to the first reference layer through the power supply wire and a second power supply via. A void defined in the second reference layer is at least partially vertically overlapping with the power supply wire, and enables the first reference layer to function as a reference plane for the power supply wire, to increase impedance of the power supply wire.

Abstract translation: 印刷电路板包括第一信号层，第一参考层，第二参考层和第二信号层。 安装在第一信号层上的集成电路包括连接到第一电源通孔的电源端子。 第二信号层包括滤波器和电源线。 滤波器包括连接到第一电源通孔的电源端子和连接到第二参考层的接地端子。 第一电源通孔通过电源线和第二电源通孔连接到第一参考层。 限定在第二参考层中的空隙至少部分地与电源线垂直重叠，并且使得第一参考层能够用作电源线的参考平面，以增加电源线的阻抗。

公开(公告)号：US07791429B2

公开(公告)日：2010-09-07

申请号：US12168541

申请日：2008-07-07

Applicant: Chun-Jen Chen ,  Shou-Kuo Hsu

Inventor： Chun-Jen Chen ,  Shou-Kuo Hsu

IPC: H03H7/03 ,  H04B3/04

CPC classification number: H04L27/01 ,  H05K1/025 ,  H05K1/181 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/10189

Abstract: An equalizer includes a first resistor and a capacitor connected in parallel. The positive terminal of the capacitor is connected to a signal transmission line on a blah printed circuit board. The negative terminal of the capacitor is connected to ground through a second resistor. A connector including the equalizer and a printed circuit board including the connector are also provided.

Abstract translation: 均衡器包括并联连接的第一电阻器和电容器。 电容器的正极端子连接到blah印刷电路板上的信号传输线。 电容器的负极通过第二个电阻连接到地。 还提供了包括均衡器的连接器和包括连接器的印刷电路板。

公开(公告)号：US07657564B2

公开(公告)日：2010-02-02

申请号：US11525445

申请日：2006-09-22

Applicant: Shou-Kuo Hsu ,  Chun-Jen Chen ,  Chun-Shan Hsiao

Inventor： Shou-Kuo Hsu ,  Chun-Jen Chen ,  Chun-Shan Hsiao

IPC: G06F17/30

CPC classification number: H03H1/0007 ,  H03H2260/00

Abstract: A method for selecting a ferrite bead for a filter to avoid a peak value in a frequency response curve of the filter is provided. The method includes the steps of: building an equivalent model database including parameters of equivalent models of ferrite beads, the parameters including an inductance and a capacitance of a corresponding equivalent model of each ferrite bead; calculating parameters of a desired ferrite bead in the filter based on parameters of the filter, the parameters of the ferrite bead including an inductance, a capacitance, and a resonant frequency; adjusting parameters of the filter until the calculated resonant frequency equals or approaches a desired resonant frequency, and finding an inductance and a capacitance respectively equaling or approaching the calculated inductance and the calculated capacitance in the database; and selecting a ferrite bead with the appropriate inductance and capacitance as found in the database for the filter.

Abstract translation: 提供了一种用于选择用于滤波器的铁氧体磁珠以避免滤波器的频率响应曲线中的峰值的方法。 该方法包括以下步骤：构建等效模型数据库，其中包括铁素体磁珠的等效模型参数，其参数包括每个铁氧体磁珠的相应等效模型的电感和电容; 基于滤波器的参数，包括电感，电容和谐振频率的铁氧体磁珠的参数来计算滤波器中期望的铁氧体磁珠的参数; 调整滤波器的参数，直到计算出的谐振频率等于或接近期望的谐振频率，并且找到分别等于或接近计算出的电感的电感和电容以及数据库中的计算电容; 并选择具有适当的电感和电容的铁氧体磁珠，如过滤器数据库中所述。

公开(公告)号：US20090242244A1

公开(公告)日：2009-10-01

申请号：US12126748

申请日：2008-05-23

Applicant: SHOU-KUO HSU ,  CHUN-JEN CHEN

Inventor： SHOU-KUO HSU ,  CHUN-JEN CHEN

IPC: H05K1/00

CPC classification number: H05K1/0245 ,  H05K1/0298 ,  H05K2201/09236 ,  H05K2201/09336

Abstract: An exemplary PCB includes a first reference layer, a first signal layer, and a second signal layer in that order. A first differential pair is arranged in the first signal layer in an edge-coupled structure referencing the first reference layer. A second differential pair is arranged in the second signal layer in edge-coupled structure. A first ground part and a second ground part are symmetrically arranged at opposite sides of the second differential pair in the second signal layer. The first differential pair is arranged above the first ground part and a projection of the first differential pair onto the second signal layer having an area coincident with the first ground part. The second differential pair references the first and second ground parts.

Abstract translation: 示例性的PCB包括第一参考层，第一信号层和第二信号层。 第一差分对以参考第一参考层的边缘耦合结构布置在第一信号层中。 第二差分对以边缘耦合结构布置在第二信号层中。 第一接地部分和第二接地部分对称地布置在第二信号层中的第二差分对的相对侧。 第一差分对布置在第一接地部分的上方，并且第一差分对的突起与具有与第一接地部分重合的区域的第二信号层上。 第二差分对参考第一和第二接地部分。

公开(公告)号：US07552353B2

公开(公告)日：2009-06-23

申请号：US11309533

申请日：2006-08-18

Applicant: Duen-Yi Ho ,  Shou-Kuo Hsu ,  Chun-Jen Chen

Inventor： Duen-Yi Ho ,  Shou-Kuo Hsu ,  Chun-Jen Chen

IPC: G06F1/04

CPC classification number: G06F1/08

Abstract: A controlling circuit for automatically adjusting clock frequency of a CPU is provided. The controlling circuit includes: a current sensing circuit for converting a current signal of the CPU to a voltage signal; a voltage amplifying circuit for amplifying the voltage signal; a multi-stage switching circuit for converting the amplified voltage signal to switched signals; and a priority decoding circuit decoding the switched signals, the decoded switched signals being input to a clock generator of the CPU, and thereby adjusting the clock frequency of the CPU to fit different load on the CPU.

Abstract translation: 提供了一种用于自动调整CPU时钟频率的控制电路。 控制电路包括：电流检测电路，用于将CPU的当前信号转换成电压信号; 用于放大电压信号的电压放大电路; 用于将放大的电压信号转换成开关信号的多级切换电路; 以及对切换信号进行解码的优先解码电路，解码的开关信号被输入到CPU的时钟发生器，从而调整CPU的时钟频率以适应CPU上的不同负载。

公开(公告)号：US20090153255A1

公开(公告)日：2009-06-18

申请号：US12330100

申请日：2008-12-08

Applicant: Huan-Ke CHIU ,  Chun-Jen CHEN

Inventor： Huan-Ke CHIU ,  Chun-Jen CHEN

IPC: H03L7/00

CPC classification number: H03L7/107 ,  H03L7/0991 ,  H03L7/10 ,  H03L7/1806 ,  H03L2207/50

Abstract: An all digital phase lock loop is disclosed, including a digitally controlled oscillator, a phase detector, and a loop filter. The digitally controlled oscillator is controlled by an oscillator tuning word to generate a variable signal. The oscillator tuning word includes a first tuning word and a second tuning word, where the frequency range of the digitally controlled oscillator, capable to be adjusted by the second tuning word, is broader than that capable to be adjusted by the first tuning word. The phase detector detects a phase error between the variable signal and a reference signal. The phase error is received by the loop filter to output the oscillator tuning word. The loop filter has several stages of the low pass filters and a modification circuit. The modification circuit detects two filter outputs from two low pass filters among the filters and accordingly adjusts the second tuning word.

Abstract translation: 公开了一种全数字锁相环，包括数字控制振荡器，相位检测器和环路滤波器。 数字控制振荡器由振荡器调谐字控制，以产生可变信号。 振荡器调谐字包括第一调谐字和第二调谐字，其中能够由第二调谐字调节的数字控制振荡器的频率范围比能够被第一调谐字调整的频率范围宽。 相位检测器检测可变信号和参考信号之间的相位误差。 相位误差由环路滤波器接收以输出振荡器调谐字。 环路滤波器具有几级低通滤波器和修改电路。 修改电路检测滤波器中的两个低通滤波器的两个滤波器输​​出，并相应地调整第二个调谐字。

公开(公告)号：US07454296B2

公开(公告)日：2008-11-18

申请号：US10722549

申请日：2003-11-28

Applicant: Kuo-Jeng Wang ,  Chun-Jen Chen

Inventor： Kuo-Jeng Wang ,  Chun-Jen Chen

IPC: G06F3/02

CPC classification number: G01N33/48785

Abstract: A biosensor with multi-channel A/D conversion and a method thereof are provided. The present biosensor includes a chip generating a time-dependent analog signal in response to a content of a specific component of a specimen provided thereon, a multi-channel A/D converter, and a microprocessor. The multi-channel A/D converter has multiple channels simultaneously receiving the time-dependent analog signal in each sampling interval to convert the time-dependent analog signal to a set of digital signals. The microprocessor receives the sets of digital signals in a period of sampling time and determines the content of the specific component based on the sets of digital signals. The present biosensor provides a multi-channel A/D conversion for the time-dependent analog signal to improve the resolution of the determination of the content of the specific component.

Abstract translation: 提供了具有多通道A / D转换的生物传感器及其方法。 本生物传感器包括响应于其上提供的试样的特定部件的内容，多通道A / D转换器和微处理器产生时间相关模拟信号的芯片。 多通道A / D转换器具有多个通道，每个采样间隔同时接收时间相关的模拟信号，以将时间相关的模拟信号转换成一组数字信号。 微处理器在采样时间段内接收数字信号组，并根据数字信号组确定特定分量的内容。 本生物传感器为时间依赖模拟信号提供多通道A / D转换，以提高确定特定部件内容的分辨率。

公开(公告)号：US20080193382A1

公开(公告)日：2008-08-14

申请号：US11937949

申请日：2007-11-09

Applicant: Kenneth L. Rock ,  Chun-Jen Chen

Inventor： Kenneth L. Rock ,  Chun-Jen Chen

IPC: A61K31/7088 ,  G01N33/53 ,  A61P29/00

CPC classification number: A61K31/7088 ,  G01N33/5008 ,  G01N33/6869 ,  G01N2333/4703

Abstract: Described are methods and compositions that inhibit IL-1 signalling for the treatment of acute inflammatory response to cell necrosis, and the attendant collateral tissue damage.

Abstract translation: 描述了抑制IL-1信号传导治疗对细胞坏死的急性炎症反应以及伴随的侧支组织损伤的方法和组合物。

公开(公告)号：US07409649B2

公开(公告)日：2008-08-05

申请号：US11306446

申请日：2005-12-28

Applicant: Chun-Jen Chen

Inventor： Chun-Jen Chen

IPC: G06F17/50

CPC classification number: G06F17/505 ,  G06F17/5036

Abstract: A system for automatically calculating parameters of an MOSFET is disclosed. The parameter calculating system runs in a computer. The parameter calculating system is used for receiving values input by the users, and for calculating parameters of the MOSFET according to the input values. The parameter calculating system includes a type selecting module (110), a value receiving module (120), a number determining module (130), a parameter calculating module (140), and a circuit netlist generating module (150). A related method is also disclosed.

Abstract translation: 公开了一种用于自动计算MOSFET参数的系统。 参数计算系统在计算机中运行。 参数计算系统用于接收用户输入的值，并根据输入值计算MOSFET的参数。 该参数计算系统包括一个类型选择模块（110），一个数值接收模块（120），一个数字确定模块（130），一个参数计算模块（140）和一个电路网表生成模块（150）。 还公开了相关方法。