公开(公告)号：US11371959B2

公开(公告)日：2022-06-28

申请号：US16715541

申请日：2019-12-16

Applicant: IMEC VZW

Inventor： Kris Covens ,  Karolien Jans ,  Koen Martens

IPC: G01N27/414 ,  G01N27/413 ,  G01N27/416

Abstract: A device and a method for performing an assay is provided. The assay device, which may be used for determining the concentration of an analyte in a sample, includes a plurality of microchambers and a Field-effect transistor (FET) arranged at the bottom of each of the plurality of microchambers. Capture probe molecules for the analyte can be arranged within the plurality of microchambers such that each microchamber contains at most one capture probe molecule. The FET can be arranged in said microchamber to give a readable output signal based on binding of the analyte, or competitor to the analyte, with the capture probe molecule.

公开(公告)号：US20220199809A1

公开(公告)日：2022-06-23

申请号：US17550383

申请日：2021-12-14

Applicant: IMEC VZW

Inventor： Julien RYCKAERT ,  Naoto HORIGUCHI ,  Boon Teik CHAN

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L21/8234

Abstract: According to an aspect there is provided a FET device. The FET device comprises a common source body portion and a set of source layer prongs protruding therefrom in a first lateral direction. First dielectric layer portions are arranged in spaces between the source layer prongs. The device further comprises a common drain body portion and a set of drain layer prongs protruding in the first lateral direction. Second dielectric layer portions are arranged in spaces between the drain layer prongs. The device further comprises a gate body comprising a common gate body portion and a set of gate prongs protruding therefrom in a second lateral direction opposite the first lateral direction. Each gate prong is formed intermediate a respective pair of first and second dielectric layer portions. The device further comprises a channel region comprising a set of channel layer portions. Each channel layer portion extends between a respective pair of source and drain layer prongs. The channel layer portions are arranged in spaces between the gate prongs. There is also provided a method for forming a FET device.

公开(公告)号：US11368164B2

公开(公告)日：2022-06-21

申请号：US17284661

申请日：2019-10-11

Applicant: UNIVERSITEIT GENT ,  IMEC VZW

Inventor： Guy Torfs ,  Hannes Ramon ,  Xin Yin

IPC: H03K9/00 ,  H03M1/66 ,  H03M1/08

Abstract: An interleaver for combining at least two incoming signals into an analog output signal includes at least a first signal path and a second signal path. Each signal path has: an input terminal, a first gain stage for multiplying a signal coming from the input terminal with a first gain (a) to obtain a first signal, a mixer and a second gain stage for multiplying a signal coming from the input terminal with a second gain (b) before or after mixing it with a clock signal to obtain a second signal, an adder for adding the first and second signal to obtain an output signal of the signal path wherein the first and second gain are different from zero. The interleaver comprises an adder for adding the output signals from the signal paths.

公开(公告)号：US11366060B2

公开(公告)日：2022-06-21

申请号：US16647011

申请日：2018-09-18

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven

Inventor： Finub James Shirley ,  Pol Van Dorpe

IPC: G01N21/64

Abstract: An apparatus for detecting fluorescent light emitted from a sample comprises: a light source, which is configured to emit excitation light of an excitation wavelength towards a sample comprising fluorophores such that fluorescent light is induced; a photo-detector for detecting light incident on the photo-detector; and an interference filter arranged on the photo-detector, wherein the interference filter is configured to selectively collect and transmit light towards the photo-detector based on an angle of incidence of the light towards the interference filter, wherein the interference filter is configured to selectively transmit supercritical angle fluorescence from the sample towards the photo-detector and suppress undercritical angle fluorescence from the sample.

公开(公告)号：US20220190352A1

公开(公告)日：2022-06-16

申请号：US17442874

申请日：2019-04-01

Applicant: Toyota Motor Europe ,  IMEC VZW ,  KATHOLIEKE UNIVERSITEIT LEUVEN

Inventor： Fanny Jeanne Julie BARDE ,  Philippe VEREECKEN ,  Yongho KEE

IPC: H01M4/88

Abstract: A method (100) for making a non-aqueous rechargeable metal-air battery is provided. The method includes before and/or after inserting (108) a cathode in the battery, a pre-conditioning step (104, 106, 110) of a 3D nanomesh structure, so as to obtain a pre-conditioned 3D nanomesh structure, the pre-conditioned 3D nanomesh structure being free of cathode active material.
A cathode to be inserted into a non-aqueous rechargeable metal-air battery is also provided. The cathode includes a pre-conditioned 3D nanomesh structure made of nanowires made of electronic conductive metal material, the pre-conditioned 3D nanomesh structure being free of cathode active material.
A non-aqueous rechargeable metal-air battery including such a cathode is also provided.

公开(公告)号：US11349729B2

公开(公告)日：2022-05-31

申请号：US16066279

申请日：2016-12-30

Applicant: Koninklijke KPN N.V. ,  IMEC VZW ,  Universiteit Gent

Inventor： Wouter Tavernier ,  Didier Colle

IPC: G06F15/173 ,  H04L41/5051 ,  H04L47/70 ,  H04L41/0896 ,  H04L41/5019 ,  G06F15/16 ,  H04L47/72

Abstract: An enhancement device (10, 116) for enhancing service requests (120) and a method of allocating network resources to a network service in a communication network is provided. The communication network comprises network resources capable of providing a network service specified in a service request issued by a client. The service request (120) comprises a direct part (121) and an indirect part (122), while the indirect part comprises at least one allocation condition. The method comprises unconditionally allocating, in response to the direct part (121) of the service request, one or more network resources to the network service, and conditionally allocating, in response to the indirect part (122) of the service request, one or more additional network resources to the network service, wherein conditionally allocated network resources are capable of being unconditionally allocated to the network service in response to the direct part of a further service request of the client and are available for allocation to another network service depending on the at least one allocation condition.

公开(公告)号：US11348842B2

公开(公告)日：2022-05-31

申请号：US17074047

申请日：2020-10-19

Applicant: IMEC VZW

Inventor： Eugenio Dentoni Litta ,  Boon Teik Chan ,  Steven Demuynck

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28 ,  H01L29/66

Abstract: A method for forming a semiconductor device, the method including: providing a substrate with at least one fin or nanowire; forming a dummy gate; providing spacers on the at least one fin or nanowire and the dummy gate; performing a first RMG module wherein high-k material is provided on at least one fin or nanowire, between the spacers; one or more annealing steps; providing a sacrificial plug between the spacers; epitaxially growing a source and drain in the at least one fin or nanowire; removing the sacrificial plug; performing a second RMG module wherein a WFM is deposited between at least part of the spacers such that the WFM is covering the high-k material of the at least one fin or nanowire.

公开(公告)号：US11342261B2

公开(公告)日：2022-05-24

申请号：US16721277

申请日：2019-12-19

Applicant: IMEC VZW

Inventor： Stefan Cosemans ,  Julien Ryckaert ,  Zsolt Tokei

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/528

Abstract: Integrated circuit comprising an interconnection system comprising at least one multilevel layer comprising first parallel electrically conductive lines, the multilevel layer comprising at least three levels forming a centerline level, an upper extension line level, and a lower extension line level the levels providing multilevel routing tracks in which the lines extend.

公开(公告)号：US20220157939A1

公开(公告)日：2022-05-19

申请号：US17369565

申请日：2021-07-07

Applicant: IMEC VZW

Inventor： Abhitosh Vais

IPC: H01L29/08 ,  H01L29/737 ,  H01L29/66

Abstract: The present disclosure provides an HBT that includes (i) a semiconductor support layer; at least four wall structures side-by-side on the support layer; (iii) a semiconductor collector-material ridge structure disposed on the support layer between two adjacent wall structures of the at least four wall structures; (iv) a semiconductor base-material layer, wherein a first part of the base-material layer is disposed on a first region of the ridge structure and a second part of the base-material layer is disposed across the wall structures, wherein the base-material layer is supported by the wall structures; (v) a semiconductor emitter-material layer disposed on the first part of the base-material layer; (vi) a base contact layer disposed on the second part of the base-material layer; an emitter contact layer disposed on the emitter-material layer; and (viii) a collector contact layer disposed on a second region of the ridge structure.

公开(公告)号：US11336236B2

公开(公告)日：2022-05-17

申请号：US16981864

申请日：2019-03-20

Applicant: UNIVERSITEIT GENT ,  IMEC VZW

Inventor： Joris Lambrecht ,  Hannes Ramon ,  Bart Moeneclaey ,  Xin Yin

IPC: H03F3/45 ,  H03F3/08 ,  H03F1/08 ,  H03G3/30

Abstract: A transimpedance amplifier is provided for converting a current between its two input terminals to a voltage over its two output terminals comprising a high-speed level shifter configured for creating a difference in input DC voltage and for being transparent for alternating voltages, an input biasing network configured for reverse biasing a photodiode connected to at least one of the input terminals and transparent for a feedback signal from the feedback network which is differentially and DC-coupled with the output terminals of the voltage amplifier and outputs of the feedback network are differentially and DC-coupled with the input biasing network of which outputs are coupled with inputs of the level shifter which is differentially and DC-coupled with input terminals of the voltage amplifier.