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    LDPC (low density parity check) code size adjustment by shortening and puncturing
    101.
    发明授权
    LDPC (low density parity check) code size adjustment by shortening and puncturing 失效
    通过缩短和穿孔对LDPC（低密度奇偶校验）码大小进行调整

    公开(公告)号：US07631246B2

    公开(公告)日：2009-12-08

    申请号：US11417316

    申请日：2006-05-03

    申请人： Ba-Zhong Shen ,  Tak K. Lee ,  Kelly Brian Cameron

    发明人： Ba-Zhong Shen ,  Tak K. Lee ,  Kelly Brian Cameron

    IPC分类号： H03M13/35

    CPC分类号： H03M13/116 ,  H03M13/1185 ,  H03M13/1188 ,  H03M13/618 ,  H03M13/6362

    摘要： LDPC (Low Density Parity Check) code size adjustment by shortening and puncturing. A variety of LDPC coded signals may be generated from an initial LDPC code using selected shortening and puncturing. Using LDPC code size adjustment approach, a single communication device whose hardware design is capable of processing the original LDPC code is also capable to process the various other LDPC codes constructed from the original LDPC code after undergoing appropriate shortening and puncturing. This provides significant design simplification and reduction in complexity because the same hardware can be implemented to accommodate the various LDPC codes generated from the original LDPC code. Therefore, a multi-LDPC code capable communication device can be implemented that is capable to process several of the generated LDPC codes. This approach allows for great flexibility in the LDPC code design, in that, the original code rate can be maintained after performing the shortening and puncturing.

    摘要翻译： LDPC（低密度奇偶校验）码字大小调整通过缩短和删截。 可以使用选择的缩短和删截从初始LDPC码生成各种LDPC编码信号。 使用LDPC码大小调整方法，硬件设计能够处理原始LDPC码的单个通信设备也能够在进行适当的缩短和删截之后处理由原始LDPC码构成的各种其他LDPC码。 这提供了重要的设计简化和复杂性的降低，因为可以实现相同的硬件以适应从原始LDPC码产生的各种LDPC码。 因此，可以实现能够处理几个所生成的LDPC码的具有多LDPC码的通信装置。 这种方法允许在LDPC码设计中具有极大的灵活性，因为可以在执行缩短和删截之后维持原始码率。

    Flexible rate matching
    102.
    发明申请
    Flexible rate matching 有权
    灵活的费率匹配

    公开(公告)号：US20120287973A1

    公开(公告)日：2012-11-15

    申请号：US13555415

    申请日：2012-07-23

    申请人： Ba-Zhong Shen ,  Sirikiat Lek Ariyavisitakul ,  Mark Kent ,  Tak K. Lee ,  Kelly Brian Cameron

    发明人： Ba-Zhong Shen ,  Sirikiat Lek Ariyavisitakul ,  Mark Kent ,  Tak K. Lee ,  Kelly Brian Cameron

    IPC分类号： H04L1/08

    CPC分类号： H04L1/1835 ,  H03M13/09 ,  H03M13/2957 ,  H03M13/6306 ,  H04L1/0066 ,  H04L1/1819

    摘要： Flexible rate matching. No constraints or restrictions are placed on a sending communication device when effectuating rate matching. The receiving communication device is able to accommodate received transmissions of essentially any size (e.g., up to an entire turbo codeword that includes all systematic bits and all parity bits). The receiving communication device employs a relatively small-sized memory to ensure a lower cost, smaller sized communication device (e.g., handset or user equipment such as a personal wireless communication device). Moreover, incremental redundancy is achieved in which successive transmissions need not include repeated information therein (e.g., a second transmission need not include any repeated information from a first transmission). Only when reaching an end of a block of bits or codeword to be transmitted, and when wrap around at the end of such block of bits or codeword occurs, would any repeat of bits be incurred within a later transmission.

    摘要翻译： 灵活的费率匹配。 在实现速率匹配时，对发送通信设备没有限制或限制。 接收通信设备能够适应基本上任何大小的接收的传输（例如，直到包括所有系统位和全部奇偶校验位的整个turbo码字）。 接收通信设备采用相对较小尺寸的存储器来确保较低成本，较小尺寸的通信设备（例如，手机或诸如个人无线通信设备的用户设备）。 此外，实现增量冗余，其中连续传输不需要包括其中的重复信息（例如，第二传输不需要包括来自第一传输的任何重复信息）。 只有到达要发送的比特或码字块的结束时，并且当发生这种比特位或码字的结束时包围，才能在稍后的传输中产生比特的任何重复。

    LDPC (Low Density Parity Check) code size adjustment by shortening and puncturing
    103.
    发明申请
    LDPC (Low Density Parity Check) code size adjustment by shortening and puncturing 有权
    LDPC（低密度奇偶校验）码字大小调整通过缩短和删截

    公开(公告)号：US20100083071A1

    公开(公告)日：2010-04-01

    申请号：US12632552

    申请日：2009-12-07

    申请人： Ba-Zhong Shen ,  Tak K. Lee ,  Kelly Brian Cameron

    发明人： Ba-Zhong Shen ,  Tak K. Lee ,  Kelly Brian Cameron

    IPC分类号： H03M13/29 ,  G06F11/10 ,  H03M13/05

    CPC分类号： H03M13/116 ,  H03M13/1185 ,  H03M13/1188 ,  H03M13/618 ,  H03M13/6362

    摘要： LDPC (Low Density Parity Check) code size adjustment by shortening and puncturing. A variety of LDPC coded signals may be generated from an initial LDPC code using selected shortening and puncturing. Using LDPC code size adjustment approach, a single communication device whose hardware design is capable of processing the original LDPC code is also capable to process the various other LDPC codes constructed from the original LDPC code after undergoing appropriate shortening and puncturing. This provides significant design simplification and reduction in complexity because the same hardware can be implemented to accommodate the various LDPC codes generated from the original LDPC code. Therefore, a multi-LDPC code capable communication device can be implemented that is capable to process several of the generated LDPC codes. This approach allows for great flexibility in the LDPC code design, in that, the original code rate can be maintained after performing the shortening and puncturing.

    摘要翻译： LDPC（低密度奇偶校验）码字大小调整通过缩短和删截。 可以使用选择的缩短和删截从初始LDPC码生成各种LDPC编码信号。 使用LDPC码大小调整方法，硬件设计能够处理原始LDPC码的单个通信设备也能够在进行适当的缩短和删截之后处理由原始LDPC码构成的各种其他LDPC码。 这提供了重要的设计简化和复杂性的降低，因为可以实现相同的硬件以适应从原始LDPC码产生的各种LDPC码。 因此，可以实现能够处理几个所生成的LDPC码的具有多LDPC码的通信装置。 这种方法允许在LDPC码设计中具有极大的灵活性，因为可以在执行缩短和删截之后维持原始码率。

    Asymmetrical MIMO wireless communications
    104.
    发明授权
    Asymmetrical MIMO wireless communications 有权
    不对称MIMO无线通信

    公开(公告)号：US08254407B2

    公开(公告)日：2012-08-28

    申请号：US12783730

    申请日：2010-05-20

    申请人： Christopher J. Hansen ,  James A. Trachewsky ,  Nambirajan Seshadri ,  Kelly B. Cameron ,  Hau Thien Tran ,  Ba-Zhong Shen

    发明人： Christopher J. Hansen ,  James A. Trachewsky ,  Nambirajan Seshadri ,  Kelly B. Cameron ,  Hau Thien Tran ,  Ba-Zhong Shen

    IPC分类号： H04W76/00

    CPC分类号： H04B7/0613 ,  H04B7/0413

    摘要： A method for asymmetrical MIMO wireless communication begins by determining a number of transmission antennas for the asymmetrical MIMO wireless communication. The method continues by determining a number of reception antennas for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas exceeds the number of reception antennas, using spatial time block coding for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas does not exceed the number of reception antennas, using spatial multiplexing for the asymmetrical MIMO wireless communication.

    摘要翻译： 一种用于非对称MIMO无线通信的方法是通过确定用于非对称MIMO无线通信的多个发送天线来开始的。 该方法通过确定用于非对称MIMO无线通信的接收天线的数量来继续。 当发送天线的数量超过接收天线的数量时，该方法继续使用用于非对称MIMO无线通信的空间时间块编码。 当发送天线的数量不超过接收天线的数量时，该方法继续使用用于非对称MIMO无线通信的空间复用。

    Parallel concatenated code with soft-in soft-out interactive turbo decoder
    105.
    发明授权
    Parallel concatenated code with soft-in soft-out interactive turbo decoder 有权
    并行级联代码与软入软交互式turbo解码器

    公开(公告)号：US07715503B2

    公开(公告)日：2010-05-11

    申请号：US12534604

    申请日：2009-08-03

    申请人： Kelly B. Cameron ,  Hau Thien Tran ,  Ba-Zhong Shen ,  Christopher R. Jones

    发明人： Kelly B. Cameron ,  Hau Thien Tran ,  Ba-Zhong Shen ,  Christopher R. Jones

    IPC分类号： H04L5/12 ,  H04L23/02

    CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

    摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

    摘要翻译： 一种并行级联（Turbo）编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列，或者对应于已由Reed-Solomon编码器提供的已经编码的数据序列。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法（例如块或随机交织）的加法规则进行交织，其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数），因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的，那么输出元组可以从编码器顺序选择，也不会丢失元组。 如果输入元组包含多个比特，那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器，或者所有编码器可以具有交织器，无论输入元组位是否独立交错。 模式类型交织也允许并行解码。

    Parallel concatenated code with soft-in soft-out interactive turbo decoder
    108.
    发明授权
    Parallel concatenated code with soft-in soft-out interactive turbo decoder 有权
    并行级联代码与软入软交互式turbo解码器

    公开(公告)号：US07460608B2

    公开(公告)日：2008-12-02

    申请号：US10897201

    申请日：2004-07-22

    申请人： Kelly B. Cameron ,  Hau Thien Tran ,  Ba-Zhong Shen ,  Christopher R. Jones

    发明人： Kelly B. Cameron ,  Hau Thien Tran ,  Ba-Zhong Shen ,  Christopher R. Jones

    IPC分类号： H04L5/12 ,  H04L23/02

    CPC分类号： H03M13/3972 ,  H03M13/151 ,  H03M13/1515 ,  H03M13/25 ,  H03M13/258 ,  H03M13/27 ,  H03M13/2757 ,  H03M13/29 ,  H03M13/2966 ,  H03M13/2978 ,  H03M13/3905 ,  H03M13/3922 ,  H03M13/3927 ,  H03M13/3988 ,  H03M13/4107 ,  H03M13/6505 ,  H03M13/6561 ,  H04L1/0041 ,  H04L1/005 ,  H04L1/006 ,  H04L1/0065 ,  H04L1/0066 ,  H04L1/0068 ,  H04L1/0071

    摘要： A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

    摘要翻译： 一种并行级联（Turbo）编码和解码的方法。 Turbo编码器接收一系列输入数据元组并进行编码。 输入序列可以对应于原始数据源的序列，或者对应于已由Reed-Solomon编码器提供的已经编码的数据序列。 turbo编码器通常包括由一个或多个交织器分离的两个或更多个编码器。 输入数据元组可以使用其中交织根据某些方法（例如块或随机交织）的加法规则进行交织，其中输入元组可以只交织到具有相同模N的交织位置 其中N是整数），因为它们在输入数据序列中具有。 如果所有的输入元组都是由所有的编码器编码的，那么输出元组可以从编码器顺序选择，也不会丢失元组。 如果输入元组包含多个比特，那么这些比特可以与具有相同模N和相同比特位置的交织位置独立交织。 这可以提高代码的鲁棒性。 第一编码器可以不具有交织器，或者所有编码器可以具有交织器，无论输入元组位是否独立交错。 模式类型交织也允许并行解码。

    Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder
    110.
    发明申请
    Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder 有权
    支持LDPC（低密度奇偶校验）解码器中的位节点和校验节点处理的公共电路

    公开(公告)号：US20050268206A1

    公开(公告)日：2005-12-01

    申请号：US11171568

    申请日：2005-06-30

    申请人： Hau Thien Tran ,  Kelly Cameron ,  Ba-Zhong Shen

    发明人： Hau Thien Tran ,  Kelly Cameron ,  Ba-Zhong Shen

    IPC分类号： G06K5/04 ,  G11B5/00 ,  G11B20/20 ,  H03M13/00 ,  H03M13/11 ,  H04L27/18 ,  H04L27/34

    CPC分类号： H04L27/34 ,  H03M13/1117 ,  H03M13/112 ,  H03M13/1137 ,  H03M13/1165 ,  H03M13/658 ,  H04L27/18

    摘要： Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder. A novel approach is presented by which a decoder may use the same circuitry to perform updating of edge messages with respect to bit nodes as well as updating of edge messages with respect to check nodes in the context of decoding LDPC coded signals. In addition, several very efficient architectures are presented to performing check node processing that involves the updating of edge messages with respect to check nodes. One embodiment performs check node processing using min** (min-double-star) processing in conjunction with min**− (min-double-star-minus) processing. Another embodiment performs check node processing using min†† (min-double-dagger) processing in conjunction with min†− (min-dagger-minus) processing. In addition, a single FIFO may be implemented to service a number of macro blocks in a parallel decoding implementation.

    摘要翻译： 支持LDPC（低密度奇偶校验）解码器中的位节点和校验节点处理的公共电路。 提出了一种新颖的方法，其中解码器可以使用相同的电路来执行相对于位节点的边缘消息的更新，以及在解码LDPC编码信号的上下文中关于校验节点的边缘消息的更新。 此外，提出了几个非常有效的架构来执行涉及到关于校验节点的边缘消息的更新的校验节点处理。 一个实施例使用min **（min-double-star）处理结合min ** - （min-double-star-minus）处理来执行校验节点处理。 另一个实施例使用min††（最小双匕首）处理结合最小† - （最小匕首 - 减号）处理来执行校验节点处理。 此外，可以实现单个FIFO以在并行解码实现中服务多个宏块。