Abstract:
An image sensor includes photodiodes arranged in semiconductor material. Each of the photodiodes is identically sized and is fabricated in the semiconductor material with identical semiconductor processing conditions. The photodiodes are organized into virtual large-small groupings including a first photodiode and a second photodiode. Microlenses are disposed over the semiconductor material with each of microlenses disposed over a respective photodiode. A first microlens is disposed over the first photodiode, and a second microlens is disposed over the second photodiode. A mask is disposed between the first microlens and the first photodiode. The mask includes an opening through which a first portion of incident light directed through the first microlens is directed to the first photodiode. A second portion of the incident light directed through the first microlens is blocked by the mask from reaching the first photodiode. There is no mask between the second microlens and the second photodiode.
Abstract:
A photon detection device includes a single photon avalanche diode (SPAD) disposed in a semiconductor layer. A guard ring structure is disposed in the semiconductor layer surrounding the SPAD to isolate the SPAD. A well region is disposed in the semiconductor layer surrounding the guard ring structure and disposed along an outside perimeter of the photon detection device. A contact region is disposed in the well region only in a corner region of the outside perimeter such that there is no contact region disposed along side regions of the outside perimeter. A distance between an inside edge of the guard ring structure and the contact region in the corner region of the outside perimeter is greater than a distance between the inside edge of the guard ring structure and the side regions of the outside perimeter such that an electric field distribution is uniform around the photon detection device.
Abstract:
A front-side-interconnect (FSI) red-green-blue-infrared (RGB-IR) photosensor array has photosensors of a first type with a diffused N-type region in a P-type well, the P-type well diffused into a high resistivity semiconductor layer; photosensors of a second type, with a deeper diffused N-type region in a P-type well, the P-type well; and photosensors of a third type with a diffused N-type region diffused into the high resistivity semiconductor layer underlying all of the other types of photosensors. In embodiments, photosensors of a fourth type have a diffused N-type region in a P-type well, the N-type region deeper than the N-type region of photosensors of the first and second types.
Abstract:
An image sensor includes a plurality of photodiodes disposed proximate to a frontside of a first semiconductor layer to accumulate image charge in response to light directed into the frontside of the first semiconductor layer. A plurality of pinning wells is disposed in the first semiconductor layer. The pinning wells separate individual photodiodes included in the plurality of photodiodes. A plurality of dielectric layers is disposed proximate to a backside of the first semiconductor layer. The dielectric layers are tuned such that light having a wavelength substantially equal to a first wavelength included in the light directed into the frontside of the first semiconductor layer is reflected from the dielectric layers back to a respective one of the plurality of photodiodes disposed proximate to the frontside of the first semiconductor layer.
Abstract:
Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.
Abstract:
An image sensor pixel includes one or more photodiodes disposed in a semiconductor layer. Pixel circuitry is disposed in the semiconductor layer coupled to the one or more photodiodes. A passivation layer is disposed proximate to the semiconductor layer over the pixel circuitry and the one or more photodiodes. A contact etch stop layer is disposed over the passivation layer. One or more metal contacts are coupled to the pixel circuitry through the contact etch stop layer. One or more isolation regions are defined in the contact etch stop layer that isolate contact etch stop layer material through which the one or more metal contacts are coupled are coupled to the pixel circuitry from the one or more photodiodes.
Abstract:
An imaging device includes a semiconductor substrate having a photosensitive element for accumulating charge in response to incident image light. The semiconductor substrate includes a light-receiving surface positioned to receive the image light. The imaging device also includes a negative charge layer and a charge sinking layer. The negative charge layer is disposed proximate to the light-receiving surface of the semiconductor substrate to induce holes in an accumulation zone in the semiconductor substrate along the light-receiving surface. The charge sinking layer is disposed proximate to the negative charge layer and is configured to conserve or increase an amount of negative charge in the negative charge layer. The negative charge layer is disposed between the semiconductor substrate and the charge sinking layer.
Abstract:
An image sensor includes a first pixel unit horizontally adjacent to a second pixel unit. Each pixel unit includes plurality of photodiodes and a shared floating diffusion region. A first pixel transistor region of the first pixel unit has a plurality of pixel transistors. A second pixel transistor region of the second pixel unit is horizontally adjacent to the first pixel transistor region and also has a plurality of pixel transistors. A transistor layout of the second pixel transistor region is a minor image of a transistor layout of the first pixel transistor region.
Abstract:
An image sensor pixel includes a photosensitive element, a floating diffusion region, a transfer gate, a dielectric charge trapping region, and a first metal contact. The photosensitive element is disposed in a semiconductor layer to receive electromagnetic radiation along a vertical axis. The floating diffusion region is disposed in the semiconductor layer, while the transfer gate is disposed on the semiconductor layer to control a flow of charge produced in the photosensitive element to the floating diffusion region. The dielectric charge trapping device is disposed on the semiconductor layer to receive electromagnetic radiation along the vertical axis and to trap charges in response thereto. The dielectric charge trapping device is further configured to induce charge in the photosensitive element in response to the trapped charges. The first metal contact is coupled to the dielectric charge trapping device to provide a first bias voltage to the dielectric charge trapping device.
Abstract:
A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is disposed in the first region and coupled between the photodiode and the floating diffusion to selectively transfer image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure lined with a dielectric layer inside the DTI structure is disposed in the semiconductor material isolates the first region on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. Doped semiconductor material inside the DTI structure is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion.