公开(公告)号：US20150194631A1

公开(公告)日：2015-07-09

申请号：US14664167

申请日：2015-03-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kunitaka YAMAMOTO ,  Toshimitsu KONUMA

IPC: H01L51/52 ,  H01L27/32

CPC classification number: H01L51/5253 ,  H01L23/3171 ,  H01L27/1214 ,  H01L27/1248 ,  H01L27/322 ,  H01L27/3244 ,  H01L27/3258 ,  H01L29/78621 ,  H01L51/529 ,  H01L51/56 ,  H01L2924/0002 ,  Y10S428/917 ,  H01L2924/00

Abstract: An object of the present invention is to provide an EL display device, which has a high operating performance and reliability.A third passivation film 45 is disposed under an EL element 203 which comprises a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, to make a structure in which heat generated by the EL element 203 is radiated. Further, the third passivation film 45 prevents alkali metals within the EL element 203 from diffusing into the TFTs side, and prevents moisture and oxygen of the TFTs side from penetrating into the EL element 203. More preferably, heat radiating effect is given to a fourth passivation film 50 to make the EL element 203 to be enclosed by heat radiating layers.

Abstract translation: 本发明的目的是提供一种具有高操作性能和可靠性的EL显示装置。 第三钝化膜45设置在包括像素电极（阳极）46，EL层47和阴极48的EL元件203的下方，以形成其中辐射由EL元件203产生的热量的结构。 此外，第三钝化膜45防止EL元件203内的碱金属扩散到TFT侧，并且防止TFT侧的水分和氧气渗透到EL元件203中。更优选地，将散热效果提供给第四钝化膜 钝化膜50以使EL元件203被散热层包围。

公开(公告)号：US20150154925A1

公开(公告)日：2015-06-04

申请号：US14548966

申请日：2014-11-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Hiroyuki MIYAKE

IPC: G09G3/36 ,  G06F3/044 ,  G06F3/042 ,  G06F3/041

CPC classification number: G09G3/3618 ,  G02F1/1345 ,  G06F3/0416 ,  G06F3/0421 ,  G06F3/044 ,  G09G3/3648 ,  G09G3/3655 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/04 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2320/0209 ,  G09G2320/0219 ,  G09G2320/10 ,  G09G2320/103 ,  G09G2330/021 ,  G09G2340/0435 ,  G09G2340/16 ,  G09G2354/00

Abstract: The liquid crystal display device includes a first substrate provided with a terminal portion, a switching transistor, a driver circuit portion, and a pixel circuit portion including a pixel transistor and a plurality of pixels, a second substrate provided with a common electrode electrically connected to the terminal portion through the switching transistor, and liquid crystal between a pixel electrode and the common electrode. In a period during which a still image is switched to a moving image, the following steps are sequentially performed: a first step of supplying the common potential to the common electrode; a second step of supplying a power supply voltage to the driver circuit portion; a third step of supplying a clock signal to the driver circuit portion; and a fourth step of supplying a start pulse signal to the driver circuit portion.

Abstract translation: 液晶显示装置包括具有端子部分的第一基板，开关晶体管，驱动电路部分和包括像素晶体管和多个像素的像素电路部分，第二基板设置有电连接到 通过开关晶体管的端子部分和像素电极与公共电极之间的液晶。 在将静止图像切换为运动图像的期间中，依次执行以下步骤：将公共电位提供给公共电极的第一步骤; 向驱动电路部供给电源电压的第2工序; 向所述驱动电路部提供时钟信号的第三步骤; 以及向所述驱动器电路部分提供起始脉冲信号的第四步骤。

公开(公告)号：US20150145752A1

公开(公告)日：2015-05-28

申请号：US14612408

申请日：2015-02-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Keisuke HAYASHI

IPC: G02B27/01 ,  G09G3/30

CPC classification number: G02B27/0176 ,  A61B5/021 ,  A61B5/024 ,  A61B5/16 ,  A61B5/486 ,  G02B27/017 ,  G02B2027/0178 ,  G09G3/30 ,  G09G2300/08

Abstract: To provide a goggle type display device system that can prevent harm to user's health. If anomaly is recognized in mind and body of a user, first video signals provided from an external device stop being displayed on LCD panels and, instead, outside scenery taken by CCD image capture elements is displayed. The user may be alarmed by this about anomaly of his or her body and, further, relaxed by looking at the outside scenery presented.

Abstract translation: 提供可以防止损害用户健康的护目镜型显示设备系统。 如果在用户的头脑和身体中识别到异常，则从外部设备提供的第一视频信号停止显示在LCD面板上，而是显示由CCD图像捕获元件拍摄的外部风景。 用户可能对此感到震惊，关于他或她身体的异常情况，还可以通过观察所呈现的外部景观来放松。

公开(公告)号：US20150035509A1

公开(公告)日：2015-02-05

申请号：US14330016

申请日：2014-07-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Jun KOYAMA ,  Kei TAKAHASHI ,  Takuro OHMARU

IPC: H02M3/157

CPC classification number: H02M3/157

Abstract: To provide a control circuit in a DC-DC converter, which includes transistors with the same conductivity type. The control circuit generates a pulse signal (GS), and includes a hysteresis comparator, a logic unit, a digital-analog converter circuit, and a comparator. The hysteresis comparator converts a signal (FB) based on an output voltage of the DC-DC converter into a digital signal (comp). The logic unit generates, in accordance with the signal comp, a pulse width modulation signal (pwm) determining a pulse width of the signal GS. The logic unit also divides a reference clock signal to generate an m-bit (m is greater than or equal to 2) second digital signal. The digital-analog converter circuit converts the m-bit second digital signal into an analog signal to generate a 2m-level triangular wave signal. The comparator compares the signal pwm with the triangular wave signal to output the comparison result as the signal GS.

Abstract translation: 在DC-DC转换器中提供一种控制电路，它包括具有相同导电类型的晶体管。 控制电路产生脉冲信号（GS），并且包括滞后比较器，逻辑单元，数模转换器电路和比较器。 滞后比较器将基于DC-DC转换器的输出电压的信号（FB）转换为数字信号（comp）。 逻辑单元根据信号comp产生确定信号GS的脉冲宽度的脉宽调制信号（pwm）。 逻辑单元还划分参考时钟信号以产生m位（m大于或等于2）的第二数字信号。 数模转换器电路将m位第二数字信号转换为模拟信号以产生2m级的三角波信号。 比较器将信号pwm与三角波信号进行比较，输出比较结果作为信号GS。

公开(公告)号：US20150014419A1

公开(公告)日：2015-01-15

申请号：US14500343

申请日：2014-09-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO ,  Takaaki KOEN ,  Yuto YAKUBO ,  Makoto YANAGISAWA ,  Hisashi OHTANI ,  Eiji SUGIYAMA ,  Nozomi HORIKOSHI

IPC: G06K19/077

CPC classification number: G06K19/07735 ,  G06K19/07722 ,  G06K19/07794 ,  H01L23/295 ,  H01L23/3157 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 Ω/cm2 is formed on at least one surface of each structure body.

Abstract translation: 一种能够进行无线通信的半导体装置，其在外力方面具有高的可靠性，特别是按压力，并且能够防止集成电路中的静电放电，而不会妨碍电波的接收。 半导体器件包括连接到集成电路的片上天线和将接收到的电波中包含的信号或功率发送到片上天线而不接触的增强天线。 在半导体器件中，集成电路和片上天线插入通过用树脂浸渍纤维体而形成的一对结构体之间。 其中一个结构体设置在片上天线和增强天线之间。 在每个结构体的至少一个表面上形成表面电阻值为大约106至1014Ω·cm 2 / cm 2的导电膜。

公开(公告)号：US20140361370A1

公开(公告)日：2014-12-11

申请号：US14464959

申请日：2014-08-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC: H01L29/786 ,  H01L27/32

CPC classification number: H01L29/78696 ,  H01L27/124 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/4908 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78627 ,  H01L33/0041 ,  H01L2029/7863

Abstract: The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween

Abstract translation: 本发明的目的是提供一种包括具有低布线电阻的大面积集成电路的TFT的可靠的半导体器件。 本发明的特征之一是在一个TFT中设置包括与栅电极重叠的区域和不与栅电极重叠的区域的LDD区域。 本发明的另一特征在于，栅电极包括第一导电层和第二导电层，并且栅极配线的一部分具有包含第一导电层和第二导电层的包层结构，其间具有低电阻层

公开(公告)号：US20140357019A1

公开(公告)日：2014-12-04

申请号：US14461938

申请日：2014-08-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Junichiro SAKATA ,  Tetsunori MARUYAMA ,  Yuki IMOTO ,  Yuji ASANO ,  Junichi KOEZUKA

IPC: H01L27/12

CPC classification number: H01L27/1255 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/127 ,  H01L28/20 ,  H01L29/24 ,  H01L29/78606 ,  H01L29/7869

Abstract: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.

Abstract translation: 通过使用含有氢化合物如硅烷（SiH 4）和氨（NH 3）的气体的等离子体CVD形成的氮化硅层910设置在与用于电阻器354的氧化物半导体层905上并直接接触，并且氮化硅 在用于薄膜晶体管355的氧化物半导体层906上设置层910，氧化硅层909用作阻挡层。 因此，与氧化物半导体层906相比，在氧化物半导体层905中引入更高浓度的氢。结果，使用于电阻器354的氧化物半导体层905的电阻比氧化物半导体层的电阻低 906用于薄膜晶体管355。

公开(公告)号：US20140226401A1

公开(公告)日：2014-08-14

申请号：US14257188

申请日：2014-04-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA

IPC: G11C16/34 ,  G11C8/08

CPC classification number: G11C14/0018 ,  G11C8/08 ,  G11C11/401 ,  G11C11/403 ,  G11C16/02 ,  G11C16/0408 ,  G11C16/0433 ,  G11C16/34 ,  H01L27/1156 ,  H01L27/1225

Abstract: A memory device in which data can be retained for a long time is provided. The memory device includes a memory element and a transistor which functions as a switching element for controlling supply, storage, and release of electrical charge in the memory element. The transistor includes a second gate electrode for controlling the threshold voltage in addition to a normal gate electrode. Further, the off-state current of the transistor is extremely low because an active layer thereof includes an oxide semiconductor. In the memory device, data is stored not by injection of electrical charge to a floating gate surrounded by an insulating film at high voltage but by control of the amount of electrical charge of the memory element through the transistor whose off-state current is extremely low.

Abstract translation: 提供了能够长时间保持数据的存储装置。 存储器件包括存储元件和用作控制存储元件中电荷的供应，存储和释放的开关元件的晶体管。 晶体管包括用于除正常栅电极之外控制阈值电压的第二栅电极。 此外，晶体管的截止电流极低，因为其有源层包括氧化物半导体。 在存储装置中，数据不是通过将电荷注入到由绝缘膜高压包围的浮动栅极而是通过截止状态电流非常低的晶体管控制存储元件的电荷量来存储的 。

公开(公告)号：US20140203654A1

公开(公告)日：2014-07-24

申请号：US14156761

申请日：2014-01-16

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Jun KOYAMA ,  Masaaki HIROKI

IPC: H02J1/00

CPC classification number: H02J1/00 ,  H01M10/4207 ,  H01M10/4257 ,  H02J7/0022 ,  H02J7/007 ,  Y02T10/7055 ,  Y10T307/50 ,  Y10T307/707

Abstract: Degradation of a secondary battery or the like is prevented. A reduction in the capacity of a secondary battery or the like due to charging or discharging is prevented. A secondary battery module in which a secondary battery can be charged in a charging period into which short discharging periods are inserted is provided. A secondary battery module in which a plurality of secondary batteries are connected in parallel, and in a charging period of the secondary batteries, current due to short-time discharging of one secondary battery can be used for charging another secondary battery is provided. To carry out such operation, a secondary battery module includes a plurality of secondary batteries, a DC/DC converter, a switch, and a control circuit.

Abstract translation: 防止了二次电池的劣化等。 防止由于充电或放电引起的二次电池等的容量的降低。 提供一种二次电池模块，其中可以在插入短放电周期的充电期间对二次电池进行充电。 其中多个二次电池并联连接的二次电池模块，并且在二次电池的充电期间，可以使用由于一个二次电池的短时间放电引起的电流来对另一个二次电池充电。 为了执行这种操作，二次电池模块包括多个二次电池，DC / DC转换器，开关和控制电路。

公开(公告)号：US20140183540A1

公开(公告)日：2014-07-03

申请号：US14107498

申请日：2013-12-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Jun KOYAMA ,  Hajime KIMURA

IPC: H01L27/12

CPC classification number: G09G3/3258 ,  G09G3/30 ,  G09G3/3225 ,  G09G3/3241 ,  G09G2300/0426 ,  G09G2310/0291 ,  G09G2320/0214 ,  G09G2320/0223 ,  G09G2330/021 ,  H01L27/124 ,  H01L27/3244 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3276 ,  H01L27/3279 ,  H01L51/5221 ,  H01L2251/5353

Abstract: There is provided an active matrix EL display device that can display a clear multi gray-scale color display to reduce the shift in the potential caused by the potential drop due to the wiring resistance of a power source supply line, in order to decrease the unevenness in a display region. A plurality of drawing out ports of the power source supply line are arranged. Further, in the wiring resistance between the external input terminal and the pixel portion power source supply line, potential compensation is performed by supplying potential to the power source supply line by a feedback amplifier. Further, in addition to above structure, the power source supply line may be arranged in a matrix.

Abstract translation: 提供一种有源矩阵EL显示装置，其可以显示清晰的多灰度彩色显示，以减少由于电源线的布线电阻引起的电位降低引起的电位偏移，以便减小不平坦度 在显示区域。 布置有电源供给线的多个引出口。 此外，在外部输入端子和像素部分电源线之间的布线电阻中，通过反馈放大器向电源线供给电位来进行电位补偿。 此外，除了上述结构之外，电源供给线可以以矩阵形式布置。