中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

238 records (took 0.027 seconds)

    REVERSE WIRELESS CHARGING
    102.
    发明申请
    REVERSE WIRELESS CHARGING 有权

    公开(公告)号：US20220021242A1

    公开(公告)日：2022-01-20

    申请号：US16931137

    申请日：2020-07-16

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

    Inventor： Jiasheng Wang

    IPC: H02J50/12 ,  H02J7/02

    Abstract: A method and system for operating a power circuit capable of transmitting and receiving wireless power. The method includes determining that the power circuit is operating in receive mode, and, based thereon, having a first equivalent capacitance. The method further includes determining that the power circuit is operating in the transmit mode, and, based thereon, having a second equivalent capacitance. The first equivalent capacitance being different than the second equivalent capacitance.

    FILTERING CIRCUIT FOR PULSE WIDTH MODULATED SIGNAL
    103.
    发明申请
    FILTERING CIRCUIT FOR PULSE WIDTH MODULATED SIGNAL 有权

    公开(公告)号：US20210135660A1

    公开(公告)日：2021-05-06

    申请号：US16991126

    申请日：2020-08-12

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

    Inventor： Hong Wu LIN

    IPC: H03K7/08 ,  H04L27/20

    Abstract: A filtering circuit for filtering a pulse width modulated (PWM) signal includes a D flip-flop having an input terminal configured to be coupled to a logic high signal and having an output terminal coupled to an output terminal of the filtering circuit; and a circuit coupled between an input terminal of the filtering circuit and the D flip-flop, the circuit configured to, for a first pulse of the PWM signal having a duty cycle within a pre-determined range: generate a positive pulse at a clock terminal of the D flip-flop as a clock signal of the D flip-flop; and generate a negative pulse at a reset terminal of the D flip-flop as a reset signal of the D flip-flop, wherein a duration between a rising edge of the positive pulse and a falling edge of the negative pulse is equal to a duration of the first pulse of the PWM signal.

    Deglitching circuit and method in class-D amplifier
    104.
    发明授权
    Deglitching circuit and method in class-D amplifier 有权

    公开(公告)号：US10965263B2

    公开(公告)日：2021-03-30

    申请号：US16354760

    申请日：2019-03-15

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

    Inventor： Ru Feng Du ,  Qi Yu Liu

    IPC: H03F3/217 ,  H03G1/04 ,  H03K19/017 ,  H03K19/20 ,  H03K19/003 ,  H03G3/30 ,  H03K19/096

    Abstract: In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.

    Proximity detector device with interconnect layers and related methods
    105.
    发明授权
    Proximity detector device with interconnect layers and related methods 有权

    公开(公告)号：US10326039B2

    公开(公告)日：2019-06-18

    申请号：US16169522

    申请日：2018-10-24

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

    Inventor： Jing-En Luan

    IPC: G01S17/02 ,  H01L23/00 ,  H01L31/173 ,  G01S17/08 ,  G01S7/481 ,  H01L31/0203 ,  H01L31/0232

    Abstract: A proximity detector device may include a first interconnect layer including a first dielectric layer, and first electrically conductive traces carried thereby, an IC layer above the first interconnect layer and having an image sensor IC, and a light source IC laterally spaced from the image sensor IC. The proximity detector device may include a second interconnect layer above the IC layer and having a second dielectric layer, and second electrically conductive traces carried thereby. The second interconnect layer may have first and second openings therein respectively aligned with the image sensor IC and the light source IC. Each of the image sensor IC and the light source IC may be coupled to the first and second electrically conductive traces. The proximity detector device may include a lens assembly above the second interconnect layer and having first and second lenses respectively aligned with the first and second openings.

    LDO regulator with improved load transient performance for internal power supply
    110.
    发明授权
    LDO regulator with improved load transient performance for internal power supply 有权

    公开(公告)号：US09946282B2

    公开(公告)日：2018-04-17

    申请号：US15244289

    申请日：2016-08-23

    Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

    Inventor： Yong Feng Liu

    IPC: G05F1/00 ,  G05F1/575 ,  G05F1/565 ,  G05F1/59 ,  G05F3/30

    CPC classification number: G05F1/575 ,  G05F1/565 ,  G05F1/59 ,  G05F3/30

    Abstract: A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.

Patent Agency Ranking