Abstract:
A thin film transistor is provided. The transistor includes a gate; a first passivation layer covering the gate; a channel layer disposed on the first passivation layer; a source and a drain that are disposed on the first passivation layer and contact two sides of the channel layer; a second passivation layer covering the channel layer, the source, and the drain; first and second transparent electrode layers that are disposed on the second passivation layer and spaced apart from each other; a first transparent conductive via that penetrates the second passivation layer and connects the source and the first transparent electrode layer; and a second transparent conductive via that penetrates the second passivation layer and connects the drain and the second transparent electrode layer. A cross-sectional area of the gate is larger than a cross-sectional area of the channel layer, the source, and the drain combined.
Abstract:
A thin film transistor is provided. The transistor includes a gate; a first passivation layer covering the gate; a channel layer disposed on the first passivation layer; a source and a drain that are disposed on the first passivation layer and contact two sides of the channel layer; a second passivation layer covering the channel layer, the source, and the drain; first and second transparent electrode layers that are disposed on the second passivation layer and spaced apart from each other; a first transparent conductive via that penetrates the second passivation layer and connects the source and the first transparent electrode layer; and a second transparent conductive via that penetrates the second passivation layer and connects the drain and the second transparent electrode layer. A cross-sectional area of the gate is larger than a cross-sectional area of the channel layer, the source, and the drain combined.
Abstract:
Provided is a complementary metal oxide semiconductor (CMOS) image sensor having a structure capable of increasing areas of photodiodes in unit pixels and expanding light receiving areas of the photodiodes. In the CMOS image sensor, transfer transistors may be formed on the photodiode, and reset transistors, source follower transistors, and selection transistors may be formed on a layer on which the transfer transistors are not formed. In such a CMOS image sensor, the areas of the photodiodes may be increased in unit pixels so that a size of the unit pixels may be reduced and sensitivity of the pixel may be improved.
Abstract:
A high-voltage oxide transistor includes a substrate; a channel layer disposed on the substrate; a gate electrode disposed on the substrate to correspond to the channel layer; a source contacting a first side of the channel layer; and a drain contacting a second side of the channel layer, wherein the channel layer includes a plurality of oxide layers, and none of the plurality of oxide layers include silicon. The gate electrode may be disposed on or under the channel layer. Otherwise, the gate electrodes may be disposed respectively on and under the channel layer.
Abstract:
An image sensor according to example embodiments may include a plurality of light-sensitive transparent oxide semiconductor layers as light-sensing layers. The light-sensing layers may be stacked in one unit pixel region.
Abstract:
Example embodiments provide a transistor and a method of manufacturing the same. The transistor may include a channel layer formed of an oxide semiconductor and a gate having a three-dimensional structure. A plurality of the transistors may be stacked in a perpendicular direction to a substrate. At least some of the plurality of transistors may be connected to each other.
Abstract:
A light-sensing apparatus in which a light sensor transistor in a light-sensing pixel is formed of an oxide semiconductor transistor for sensing light, a method of driving the light-sensing apparatus, and an optical touch screen apparatus including the light-sensing apparatus. The light-sensing apparatus includes a light-sensing pixel array having a plurality of light-sensing pixels arranged in rows and columns, and a plurality of gate lines which are arranged in a row direction and respectively provide a gate voltage to the light-sensing pixel. Each of the light-sensing pixels includes a light sensor transistor for sensing light and a switch transistor for outputting a light-sensing signal from the light sensor transistor, and gates of the light sensor transistors of the light-sensing pixels arranged in an arbitrary row are connected to a gate line arranged in a row previous or next to the arbitrary row.
Abstract:
An optical touch screen apparatus in which an oxide semiconductor transistor is used as a light sensing device, and a method of driving the optical touch screen apparatus. The optical touch screen apparatus includes an array including a plurality of light sensing pixels for sensing incident light, a gate driver for providing each of the light sensing pixels with a gate voltage and a reset signal and a signal output unit for receiving a light sensing signal from each of the plurality of light sensing pixels to output a data signal. The gate driver includes a plurality of gate lines that provide a gate voltage to each of the light sensing pixels and at least one reset line that provides a reset signal to each of the light sensing pixels and is electrically connected to the plurality of light sensing pixels.
Abstract:
Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous.
Abstract:
Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter.