公开(公告)号：US10381072B2

公开(公告)日：2019-08-13

申请号：US14266456

申请日：2014-04-30

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  Tsz W. Chan ,  Christopher W. Petz ,  Everett Allen McTeer

IPC: G11C13/00 ,  H01L27/24 ,  H01L45/00

Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.

公开(公告)号：US10354989B1

公开(公告)日：2019-07-16

申请号：US15980908

申请日：2018-05-16

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Everett A. McTeer ,  Christopher W. Petz ,  Haoyu Li ,  John Mark Meldrim ,  Yongjun Jeff Hu

IPC: G11C11/34 ,  H01L27/02 ,  H01L23/532 ,  G11C5/06 ,  H01L27/12 ,  H01L21/82

Abstract: An integrated assembly having an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Also, an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Also, methods of forming integrated assemblies.

公开(公告)号：US10325917B2

公开(公告)日：2019-06-18

申请号：US15686107

申请日：2017-08-24

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  Allen McTeer

IPC: H01L27/11524 ,  H01L21/02 ,  H01L21/322 ,  H01L27/1157 ,  H01L27/11582

Abstract: Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.

公开(公告)号：US20190140023A1

公开(公告)日：2019-05-09

申请号：US16241525

申请日：2019-01-07

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  Tsz W. Chan ,  Swapnil Lengade ,  Everett Allen McTeer ,  Shu Qin

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2481 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/165 ,  H01L45/1675

Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.

公开(公告)号：US20180254334A1

公开(公告)日：2018-09-06

申请号：US15967457

申请日：2018-04-30

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu

IPC: H01L29/66 ,  H01L29/792 ,  H01L29/423 ,  H01L27/1157 ,  H01L21/28 ,  H01L27/11521 ,  H01L27/115 ,  H01L27/11524

Abstract: Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a gate material, an insulative material, and a sacrificial material. The sacrificial material is removed from the FET and charge storage transistor gate stacks. The insulative material of the FET gate stacks is etched through. A conductive material is formed over the FET gate stacks and over the charge storage transistor gate stacks. The conductive material physically contacts the gate material of the FET gate stacks, and is separated from the gate material of the charge storage transistor gate stacks by the insulative material remaining in the charge storage transistor gate stacks. Some embodiments include gate structures.

公开(公告)号：US20170309818A1

公开(公告)日：2017-10-26

申请号：US15642673

申请日：2017-07-06

Applicant: Micron Technology, Inc.

Inventor： Tsz W. Chan ,  D.V. Nirmal Ramaswamy ,  Qian Tao ,  Yongjun Jeff Hu ,  Everett A. McTeer

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/145 ,  H01L27/2427 ,  H01L45/04 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/1608

Abstract: A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described.

公开(公告)号：US09716225B2

公开(公告)日：2017-07-25

申请号：US14476312

申请日：2014-09-03

Applicant: Micron Technology, Inc.

Inventor： Tsz W. Chan ,  D. V. Nirmal Ramaswamy ,  Qian Tao ,  Yongjun Jeff Hu ,  Everett A. McTeer

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L45/145 ,  H01L27/2427 ,  H01L45/04 ,  H01L45/1253 ,  H01L45/141 ,  H01L45/1608

Abstract: A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described.

公开(公告)号：US09608185B2

公开(公告)日：2017-03-28

申请号：US14261901

申请日：2014-04-25

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  John Mark Meldrim ,  Shanming Mou ,  Everett Allen McTeer

IPC: H01L33/62 ,  H01L33/40 ,  H01L33/32 ,  H01L33/46

CPC classification number: H01L33/62 ,  H01L33/0066 ,  H01L33/0075 ,  H01L33/32 ,  H01L33/40 ,  H01L33/46 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.

公开(公告)号：US20160372479A1

公开(公告)日：2016-12-22

申请号：US15255967

申请日：2016-09-02

Applicant: Micron Technology, Inc.

Inventor： Zhenyu Lu ,  Roger W. Lindsay ,  Andrew Bicksler ,  Yongjun Jeff Hu ,  Haitao Liu

IPC: H01L27/115 ,  H01L23/528 ,  H01L29/45

CPC classification number: H01L27/11556 ,  H01L23/5283 ,  H01L27/11524 ,  H01L29/456 ,  H01L29/66825 ,  H01L29/7926

Abstract: Methods for forming a string of memory cells, an apparatus having a string of memory cells, and a system are disclosed. A method for forming the string of memory cells comprises forming a metal silicide source material over a substrate. The metal silicide source material is doped. A vertical string of memory cells is formed over the metal silicide source material. A semiconductor material is formed vertically and adjacent to the vertical string of memory cells and coupled to the metal silicide source material.

公开(公告)号：US09385317B2

公开(公告)日：2016-07-05

申请号：US14884035

申请日：2015-10-15

Applicant: Micron Technology, Inc.

Inventor： Martin Schubert ,  Shu Qin ,  Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L29/02 ,  H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/146 ,  H01L45/16

Abstract: Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.