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公开(公告)号:US20210391352A1
公开(公告)日:2021-12-16
申请号:US16902897
申请日:2020-06-16
IPC分类号: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L21/02 , H01L21/3115 , H01L21/311
摘要: Some embodiments include an integrated assembly having a vertical stack of alternating insulative levels and conductive levels. The insulative levels have a same primary composition as one another. At least one of the insulative levels is compositionally different relative to others of the insulative levels due to said at least one of the insulative levels including dopant dispersed within the primary composition. An opening extends vertically through the stack. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US20190088867A9
公开(公告)日:2019-03-21
申请号:US15882666
申请日:2018-01-29
发明人: Tsz W. Chan , Yongjun Jeff Hu , Swapnil Lengade , Shu Qin , Everett Allen McTeer
摘要: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall
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公开(公告)号:US09281471B2
公开(公告)日:2016-03-08
申请号:US14266365
申请日:2014-04-30
发明人: Yongjun Jeff Hu , Tsz W. Chan , Swapnil Lengade , Everett Allen McTeer , Shu Qin
CPC分类号: H01L27/2481 , H01L27/2409 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/16 , H01L45/1616 , H01L45/165 , H01L45/1675
摘要: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.
摘要翻译: 已经公开了用于制造存储器件的存储器件和方法。 一种这样的存储器件包括形成在字线材料上的第一电极材料。 在第一电极材料上形成选择器装置材料。 第二电极材料形成在选择器装置材料上。 在第二电极材料上形成相变材料。 在相变材料上形成第三电极材料。 粘附物质是等离子体掺杂到存储器堆叠的侧壁中,并且衬垫材料形成在存储器堆叠的侧壁上。 粘附物质与存储器堆叠和侧壁衬套的元件混合以终止元件和侧壁衬套的不满足的原子键。
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公开(公告)号:US20150041749A1
公开(公告)日:2015-02-12
申请号:US13959958
申请日:2013-08-06
IPC分类号: H01L45/00
CPC分类号: H01L45/165 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1675
摘要: A method of forming a memory cell includes forming an outer electrode material elevationally over and directly against a programmable material. The programmable material and the outer electrode material contact one another along an interface. Protective material is formed elevationally over the outer electrode material. Dopant is implanted through the protective material into the outer electrode material and the programmable material and across the interface to enhance adhesion of the outer electrode material and the programmable material relative one another across the interface. Memory cells are also disclosed.
摘要翻译: 一种形成存储单元的方法包括在外部电极材料上形成并且直接抵靠可编程材料。 可编程材料和外部电极材料沿着界面彼此接触。 保护材料在外部电极材料上垂直地形成。 通过保护材料将掺杂剂注入到外部电极材料和可编程材料中并跨越界面,以增强外部电极材料和可编程材料相对于界面的粘合性。 还公开了存储单元。
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公开(公告)号:US20230422503A1
公开(公告)日:2023-12-28
申请号:US18244169
申请日:2023-09-08
IPC分类号: H10B43/27 , H01L21/311 , H10B41/27
CPC分类号: H10B43/27 , H01L21/31111 , H10B41/27
摘要: A method used in forming a memory array comprising strings of memory cells comprises forming an upper stack directly above a lower stack. The lower stack comprises vertically-alternating lower-first-tiers and lower-second-tiers. The upper stack comprises vertically-alternating upper-first-tiers and upper-second-tiers. Lower channel openings extend through the lower-first-tiers and the lowers-second-tiers. The lower channel openings have sacrificial material therein. An upper of the lower-first-tiers or a lower of the upper-first-tiers comprises non-stoichiometric silicon nitride comprising (a) or (b), where (a): a nitrogen-to-silicon atomic ratio greater than 1.33 and less than 1.5; and (b): a nitrogen-to-silicon atomic ratio greater than or equal to 1.0 and less than 1.33. A higher of the upper-first-tiers that is above said lower upper-first-tier comprises silicon nitride not having either the (a) or the (b). Upper channel openings are etched through the upper-first-tiers and the upper-second-tiers to stop on said upper lower-first-tier or said lower upper-first-tier. After the stop, the sacrificial material is removed from the lower channel openings and form channel-material strings in the upper and lower channel openings. Other embodiments, including structure independent of method, are disclosed.
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公开(公告)号:US11329064B2
公开(公告)日:2022-05-10
申请号:US16902897
申请日:2020-06-16
IPC分类号: H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L21/02 , H01L21/3115 , H01L21/311
摘要: Some embodiments include an integrated assembly having a vertical stack of alternating insulative levels and conductive levels. The insulative levels have a same primary composition as one another. At least one of the insulative levels is compositionally different relative to others of the insulative levels due to said at least one of the insulative levels including dopant dispersed within the primary composition. An opening extends vertically through the stack. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US11038107B2
公开(公告)日:2021-06-15
申请号:US16202379
申请日:2018-11-28
摘要: A semiconductor structure includes a plurality of stack structures overlying a substrate. Each stack structure includes a first chalcogenide material over a conductive material overlying the substrate, an electrode over the first chalcogenide material, a second chalcogenide material over the electrode, a liner on sidewalls of at least one of the first chalcogenide material or the second chalcogenide material, and a dielectric material over and in contact with sidewalls of the electrode and in contact with the liner. Related semiconductor devices and systems, methods of forming the semiconductor structure, semiconductor device, and systems, and methods of forming the liner in situ are disclosed.
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公开(公告)号:US20160218282A1
公开(公告)日:2016-07-28
申请号:US15090292
申请日:2016-04-04
发明人: Tsz W. Chan , Yongjun Jeff Hu , Swapnil Lengade , Shu Qin , Everett Allen McTeer
CPC分类号: H01L45/06 , G11C13/0004 , H01L27/2409 , H01L27/2481 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/16 , H01L45/1616 , H01L45/165 , H01L45/1675
摘要: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.
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公开(公告)号:US20160190209A1
公开(公告)日:2016-06-30
申请号:US15063179
申请日:2016-03-07
发明人: Yongjun Jeff Hu , Tsz W. Chan , Swapnil Lengade , Everett Allen McTeer , Shu Qin
CPC分类号: H01L27/2481 , H01L27/2409 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/16 , H01L45/1616 , H01L45/165 , H01L45/1675
摘要: Memory devices and methods for fabricating memory devices have been disclosed. One such memory device includes a first electrode material formed on a word line material. A selector device material is formed on the first electrode material. A second electrode material is formed on the selector device material. A phase change material is formed on the second electrode material. A third electrode material is formed on the phase change material. An adhesion species is plasma doped into sidewalls of the memory stack and a liner material is formed on the sidewalls of the memory stack. The adhesion species intermixes with an element of the memory stack and the sidewall liner to terminate unsatisfied atomic bonds of the element and the sidewall liner.
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公开(公告)号:US09306159B2
公开(公告)日:2016-04-05
申请号:US14266415
申请日:2014-04-30
发明人: Tsz W. Chan , Yongjun Jeff Hu , Swapnil Lengade , Shu Qin , Everett Allen McTeer
CPC分类号: H01L45/06 , G11C13/0004 , H01L27/2409 , H01L27/2481 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/16 , H01L45/1616 , H01L45/165 , H01L45/1675
摘要: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall liner.
摘要翻译: 已经公开了用于制造存储器件的存储器件和方法。 一种这样的方法包括从多个元件形成存储器堆叠。 在存储器堆叠的至少一个侧壁上形成粘附物质,其中粘附物质具有梯度结构,其导致粘附物质与存储器堆叠的元件混合以终止元件的不满足的原子键。 梯度结构还包括在至少一个侧壁的外表面上的粘附物质的膜。 将电介质材料注入到粘附物质的膜中以形成侧壁衬里。
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