Ground fault circuit interrupter with reverse wiring protection
    111.
    发明申请
    Ground fault circuit interrupter with reverse wiring protection 失效
    接地故障电路断路器具有反接线保护功能

    公开(公告)号:US20060044086A1

    公开(公告)日:2006-03-02

    申请号:US10945672

    申请日:2004-09-21

    Applicant: Ping Wang

    Inventor: Ping Wang

    CPC classification number: H01H83/02 H01H83/04

    Abstract: A circuit interrupter comprises a pair of fixed contact strips, a pair of movable contact strips, a reset component, a movable component, and a tripping component that contains a reset contact. Each of the fixed contact strips has a fixed contact. Each of the movable contact strips has a fixed end and a movable end which has a movable contact arranged for contacting one of the corresponding fixed contacts. The movable component is disposed to sustain the movable ends of the movable contact strips and is capable of either being latched with or released from the reset component to move between a first position where the movable contacts are separated from the fixed contacts and the movable contact strips are separated from the reset contact, a second position where either the movable contact strip contacts the reset contact and the movable contacts are separated from the fixed contacts, and a third position where the movable contacts make contact with the respective fixed contacts and the movable contact strips are separated from the reset contact. The tripping component is capable of latching the reset component with the movable component for the movable component to move to the third position upon detection of a reset request and releasing the reset component from the movable component for movable component to move to the first position upon detection of a fault condition.

    Abstract translation: 电路断路器包括一对固定接触带,一对可动接触带,复位部件,可移动部件和包含复位接点的跳闸部件。 每个固定接触片具有固定接触。 每个可动接触片具有固定端和可动端,该可动端具有布置成用于接触相应的固定触点中的一个的可动触点。 可移动部件被设置成维持可动接触片的可动端,并且能够与复位部件锁定或从复位部件释放,以在可动触头与固定触点分离的第一位置和可动接触片之间移动 与复位触点分离,第二位置,其中可动触头条接触复位触点和可动触头与固定触头分离,以及第三位置,其中可动触头与相应的固定触点和可动触头 条带与复位触点分开。 跳闸部件能够将复位部件与可动部件锁定,用于可移动部件在检测到复位请求时移动到第三位置,并且将复位部件从用于可移动部件的可移动部件释放以在检测到时移动到第一位置 的故障状况。

    Media for clostridium bacterium and processes for obtaining a clostridial toxin
    113.
    发明申请
    Media for clostridium bacterium and processes for obtaining a clostridial toxin 有权
    梭菌细菌的培养基和获得梭菌毒素的方法

    公开(公告)号:US20050238668A1

    公开(公告)日:2005-10-27

    申请号:US11072050

    申请日:2005-03-03

    Abstract: Animal product free (APF) media and processes for the culture and fermentation of botulinum toxin producing Clostridium botulinum bacteria. The botulinum toxin obtained can be used for formulating and compounding botulinum toxin pharmaceutical compositions. The APF media can contain significantly reduced levels of meat or dairy by-products and use non-animal based products instead of the animal-derived products. Preferably, the APF media used are substantially free or free of animal derived products.

    Abstract translation: 不含动物产品(APF)的培养基和产生肉毒杆菌毒素的肉毒杆菌的培养和发酵过程。 获得的肉毒杆菌毒素可用于配制和配制肉毒杆菌毒素药物组合物。 APF媒体可以显着降低肉类或乳制品副产品的含量,并使用非动物产品,而不是动物产品。 优选地,所用的APF介质基本上是游离的或没有动物衍生的产品。

    Treatment of shock using adrenomedullin and adrenomedullin binding protein-1
    116.
    发明授权
    Treatment of shock using adrenomedullin and adrenomedullin binding protein-1 有权
    使用肾上腺髓质素和肾上腺髓质素结合蛋白-1治疗休克

    公开(公告)号:US06864237B2

    公开(公告)日:2005-03-08

    申请号:US10439762

    申请日:2003-05-16

    Applicant: Ping Wang

    Inventor: Ping Wang

    CPC classification number: A61K38/22 A61K38/1709

    Abstract: The present invention provides methods of preventing organ destruction and shut-down due to shock in a patient suffering from sepsis or at risk for sepsis, comprising administering adrenomedullin and adrenomedullin binding protein-1 to the patient. Also provided are compositions containing adrenomedullin and adrenomedullin binding protein-1 or precursors, in a pharmaceutically acceptable carrier.

    Abstract translation: 本发明提供了在患有败血症或脓毒症风险的患者中由于休克而导致器官破坏和关闭的方法,包括向患者施用肾上腺髓质素和肾上腺髓质素结合蛋白-1。 还提供了在药学上可接受的载体中含有肾上腺髓质素和肾上腺髓质素结合蛋白-1或前体的组合物。

    System and method for performing explicit rate marking for flow control in ATM networks using a virtual bandwidth-based methodology
    118.
    发明授权
    System and method for performing explicit rate marking for flow control in ATM networks using a virtual bandwidth-based methodology 有权
    使用基于虚拟带宽的方法对ATM网络中的流量控制执行显式速率标记的系统和方法

    公开(公告)号:US06570854B1

    公开(公告)日:2003-05-27

    申请号:US09312780

    申请日:1999-05-17

    Abstract: An explicit rate marking system is disclosed for use in connection with a switching node to generate an explicit rate value for use in a resource management cell associated with a virtual circuit in an ATM network. The explicit rate marking system comprises a virtual bandwidth value generator module and an explicit rate value generator module. The virtual bandwidth value generator module generate a virtual bandwidth value reflecting an available bandwidth capacity value, an explicit rate value associated with each bottlenecked virtual circuit for which the switching node forms part of a path, and a minimum cell rate value associated with each unbottlenecked virtual circuit for which the switching node forms part of a path. The explicit rate value generator module generates the explicit rate value in relation to the virtual bandwidth value and the minimum cell rate value associated with the virtual circuit and other virtual circuits for which the switching node forms part of a path.

    Abstract translation: 公开了明确的速率标记系统,用于与交换节点结合使用以产生用于与ATM网络中的虚拟电路相关联的资源管理小区中的显式速率值。 显式速率标记系统包括虚拟带宽值发生器模块和显式速率值发生器模块。 虚拟带宽值生成器模块生成反映可用带宽容量值的虚拟带宽值,与切换节点构成路径的一部分的每个瓶颈虚拟电路相关联的显式速率值,以及与每个未封装虚拟机相关联的最小单元速率值 交换节点构成路径的一部分的电路。 显式速率值发生器模块产生与虚拟带宽值相关联的显式速率值和与虚拟电路和交换节点形成路径的一部分的其他虚拟电路相关联的最小信元速率值。

    Sensing circuit for a floating gate memory device having multiple levels
of storage in a cell
    119.
    发明授权
    Sensing circuit for a floating gate memory device having multiple levels of storage in a cell 失效
    用于在单元中具有多级存储的浮动栅极存储器件的感测电路

    公开(公告)号:US5910914A

    公开(公告)日:1999-06-08

    申请号:US965834

    申请日:1997-11-07

    Applicant: Ping Wang

    Inventor: Ping Wang

    CPC classification number: G11C11/5642 G11C11/5621 G11C2211/5645

    Abstract: A sensing circuit for sensing the multiple states of a selected memory cell of a floating gate memory device is disclosed. The sensing circuit has a first voltage amplifier which generates a first output voltage, and a plurality of current amplifiers which receive the first output voltage and generate a plurality of first output currents in response thereto. The circuit also comprises a dummy cell, a second voltage amplifier connected thereto for generating a second output voltage. A second current amplifier receives the second output voltage and generates a plurality of second output currents in response thereto. Each of a plurality of inverters receives one of the first and one of the second output currents, and generates an output. The output of the plurality of invertors are supplied to a decoder to generate a decoded signal representative of the plurality of states of the selected memory cell.

    Abstract translation: 公开了一种用于感测浮动栅极存储器件的选定存储单元的多个状态的感测电路。 感测电路具有产生第一输出电压的第一电压放大器和接收第一输出电压并响应于此产生多个第一输出电流的多个电流放大器。 电路还包括虚拟单元,连接到其上的第二电压放大器,用于产生第二输出电压。 第二电流放大器接收第二输出电压并响应于此产生多个第二输出电流。 多个逆变器中的每一个接收第一和第二输出电流中的一个,并产生输出。 将多个反相器的输出提供给解码器,以产生表示所选存储单元的多个状态的解码信号。

    Write protection circuit for use with an electrically alterable
non-volatile memory card
    120.
    发明授权
    Write protection circuit for use with an electrically alterable non-volatile memory card 失效
    写入保护电路与电动可变非易失性存储卡一起使用

    公开(公告)号:US5226006A

    公开(公告)日:1993-07-06

    申请号:US700515

    申请日:1991-05-15

    CPC classification number: G11C7/24

    Abstract: In the present invention a write protection circuit capable of being used in a memory card is disclosed. The write protection circuit receives an externally supplied write protect signal and generates a protection signal for use with an associated electrically alterable non-volatile memory. The write protection circuit has two non-volatile storage registers, each storing a single bit. Logic means receives a bit from a first register and passes the externally supplied write protect signal as the internally generated protection signal when the bit is in a "1" state. When the bit is in another state, the signal from the second register is used as the protection signal.

    Abstract translation: 在本发明中,公开了一种能够用于存储卡的写保护电路。 写保护电路接收外部提供的写保护信号,并产生用于与相关联的电可更改非易失性存储器一起使用的保护信号。 写保护电路具有两个非易失性存储寄存器,每个寄存器存储一个位。 当位处于“1”状态时,逻辑装置从第一个寄存器接收一个位,并将外部提供的写保护信号作为内部产生的保护信号。 当该位处于另一状态时,来自第二寄存器的信号用作保护信号。

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