Dielectric waveguide signal divider
    113.
    发明授权
    Dielectric waveguide signal divider 有权
    介质波导信号分压器

    公开(公告)号:US09484614B2

    公开(公告)日:2016-11-01

    申请号:US14498512

    申请日:2014-09-26

    CPC classification number: H01P5/12 H01P3/16

    Abstract: A dielectric waveguide (DWG) has a longitudinal core member with a first dielectric constant value surrounded by a cladding with a cladding dielectric constant value that is lower than the first dielectric constant value. A first port of a signal divider is connected to receive a signal from the DWG. A second port and a third port are each configured to output a portion of the signal received on the first port, wherein the first and second port are approximately in line and the third port is at an angle to a line formed by the first port and the second port. The first port and second port have a core member with the first dielectric constant value, and the third port has a core member with a second dielectric constant value that is higher than the first dielectric constant value.

    Abstract translation: 电介质波导(DWG)具有纵向磁芯构件,其具有由包层的围绕的第一介电常数值,包层介电常数值低于第一介电常数值。 信号分配器的第一个端口被连接以从DWG接收信号。 第二端口和第三端口被配置为输出在第一端口上接收的信号的一部分,其中第一端口和第二端口大致对齐,并且第三端口与由第一端口形成的线成一定角度,并且 第二个港口。 第一端口和第二端口具有第一介电常数值的芯构件,并且第三端口具有高于第一介电常数值的第二介电常数值的芯构件。

    METHODS OF FORMING CONDUCTIVE AND RESISTIVE CIRCUIT STRUCTURES IN AN INTEGRATED CIRCUIT OR PRINTED CIRCUIT BOARD
    114.
    发明申请
    METHODS OF FORMING CONDUCTIVE AND RESISTIVE CIRCUIT STRUCTURES IN AN INTEGRATED CIRCUIT OR PRINTED CIRCUIT BOARD 审中-公开
    在集成电路或印刷电路板中形成导电和电阻电路结构的方法

    公开(公告)号:US20160295696A1

    公开(公告)日:2016-10-06

    申请号:US14674809

    申请日:2015-03-31

    Abstract: Described examples include methods of fabricating conductive and resistive structures by direct-write variable impedance patterning using nanoparticle-based metallization layers or chemical reaction-based deposition. In some examples, a low conductivity nanoparticle material is deposited over a surface. The nanoparticle material is selectively illuminated at different applied energy levels via illumination source power adjustments and/or scan rate adjustments for selective patterned sintering to create conductive circuit structures as well as resistive circuit structures including gradient resistive circuit structures having an electrical resistivity profile that varies along the structure length. Further examples include methods in which a non-conductive reactant layer is deposited or patterned, and a second solution is deposited in varying amounts using an additive deposition for reaction with the reactant layer to form controllably conductive structures.

    Abstract translation: 描述的实例包括通过使用基于纳米颗粒的金属化层或基于化学反应的沉积的直写可变阻抗图案来制造导电和电阻结构的方法。 在一些实例中,低电导率纳米颗粒材料沉积在表面上。 通过用于选择性图案化烧结的照明源功率调节和/或扫描速率调整,以不同的施加能量级别选择性地照射纳米颗粒材料以产生导电电路结构以及包括梯度电阻电路结构的电阻电路结构,所述梯度电阻结构具有沿着 结构长度。 其他实例包括其中沉积或图案化非导电反应物层的方法,并且使用添加剂沉积物以不同的量沉积第二溶液以与反应物层反应以形成可控导电的结构。

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