公开(公告)号：US08295348B2

公开(公告)日：2012-10-23

申请号：US12176506

申请日：2008-07-21

Applicant: Yong-Gyoo Kim ,  Tae-Sung Park ,  Jae-Hoon Kwon ,  Do-Young Joung ,  Sung-Kee Kim ,  Chang-Hyun Lee

Inventor： Yong-Gyoo Kim ,  Tae-Sung Park ,  Jae-Hoon Kwon ,  Do-Young Joung ,  Sung-Kee Kim ,  Chang-Hyun Lee

IPC: H04N11/02

CPC classification number: H04N19/166 ,  H04N19/107 ,  H04N19/124 ,  H04N19/14 ,  H04N19/46 ,  H04N19/70

Abstract: Disclosed is a method for controlling bit rates in consideration of wireless channel environment by an apparatus that transmits and receives moving picture encoding data via a wireless network. The apparatus for transmitting/receiving data through a wireless communication network connected to the apparatus including a channel state analyzing unit for analyzing a wireless channel environment, an encoding controller for generating control information containing information about a quantization parameter, skip or non-skip of frames indication, frame type indication, and use or non-use of an Error Resilient Tool (ERT) indication, in consideration of an analyzation result received from the channel state analyzing unit, a moving picture encoding unit for encoding incoming moving picture data, based on the control information received from the encoding controller; and a data transmitting/receiving unit for transferring the encoded moving picture data through the wireless channel to an exterior.

Abstract translation: 公开了一种通过无线网络发送和接收运动图像编码数据的装置来考虑无线信道环境来控制比特率的方法。 用于通过连接到包括用于分析无线信道环境的信道状态分析单元的装置的无线通信网络发送/接收数据的装置，用于生成包含关于量化参数的信息的控制信息的编码控制，帧的跳过或非跳过 考虑到从通道状态分析单元接收到的分析结果，指示，帧类型指示以及使用或不使用错误弹性工具（ERT）指示，基于对来自运动图像数据进行编码的运动图像编码单元 从编码控制器接收的控制信息; 以及用于通过无线信道将编码运动图像数据传送到外部的数据发送/接收单元。

公开(公告)号：US08253183B2

公开(公告)日：2012-08-28

申请号：US12861366

申请日：2010-08-23

Applicant: Chang-hyun Lee

Inventor： Chang-hyun Lee

IPC: H01L29/788

CPC classification number: H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L29/42332 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/792

Abstract: Provided is a charge trapping nonvolatile memory device. The charge trapping nonvolatile memory device includes: an active pattern and a gate electrode, spaced apart from each other; a charge storage layer between the active pattern and the gate electrode; a tunnel insulation layer between the active pattern and the charge storage layer; and a blocking insulation layer disposed between the charge storage layer and the gate electrode and including a high-k layer with a higher dielectric constant than the tunnel insulation layer and a barrier insulation layer with a higher band gap than the high-k layer. A physical thickness of the high-k layer is less than or identical to that of the barrier insulation layer.

Abstract translation: 提供了一种电荷捕获非易失性存储器件。 电荷俘获非易失性存储器件包括：有源图案和栅电极，彼此间​​隔开; 活性图案和栅电极之间的电荷存储层; 在活性图案和电荷存储层之间的隧道绝缘层; 以及设置在电荷存储层和栅电极之间并且包括具有比隧道绝缘层更高的介电常数的高k层的隔离绝缘层和具有比高k层更高的带隙的阻挡绝缘层。 高k层的物理厚度小于或等于阻挡绝缘层的物理厚度。

公开(公告)号：US20120146118A1

公开(公告)日：2012-06-14

申请号：US13248333

申请日：2011-09-29

Applicant: Chang-Hyun Lee ,  Young-Woo Park ,  Kye-Hyun Kyung ,  Cheon-An Lee ,  Sung-il Chang ,  Chul Bum Kim

Inventor： Chang-Hyun Lee ,  Young-Woo Park ,  Kye-Hyun Kyung ,  Cheon-An Lee ,  Sung-il Chang ,  Chul Bum Kim

IPC: H01L27/108 ,  H01L27/092

CPC classification number: H01L21/823857 ,  G11C16/0483 ,  G11C16/30 ,  H01L27/105 ,  H01L27/11546 ,  H01L27/11556

Abstract: A semiconductor memory device has a memory cell region and a peripheral region. The device includes low voltage transistors at the peripheral region having gate insulation films with different thicknesses. For example, a gate insulation film of a low voltage transistor used in an input/output circuit of the memory device may be thinner than the gate insulation film of a low voltage transistor used in a core circuit for the memory device. Since low voltage transistors used at an input/output circuit are formed to be different from low voltage transistors used at a core circuit or a high voltage pump circuit, high speed operation and low power consumption characteristics of a non-volatile memory device may be.

Abstract translation: 半导体存储器件具有存储单元区域和周边区域。 该器件包括具有不同厚度的栅极绝缘膜的外围区域的低电压晶体管。 例如，在存储器件的输入/输出电路中使用的低电压晶体管的栅极绝缘膜可以比用于存储器件的核心电路中的低电压晶体管的栅极绝缘膜更薄。 由于在输入/输出电路中使用的低压晶体管形成为与核心电路或高压泵浦电路所使用的低压晶体管不同，所以可以是非易失性存储器件的高速工作和低功耗特性。

公开(公告)号：US20120132982A1

公开(公告)日：2012-05-31

申请号：US13282575

申请日：2011-10-27

Applicant: Chang-Hyun LEE ,  Byung-Kyu CHO ,  Jang-Hyun YOU ,  Albert FAYRUSHIN

Inventor： Chang-Hyun LEE ,  Byung-Kyu CHO ,  Jang-Hyun YOU ,  Albert FAYRUSHIN

IPC: H01L29/788

CPC classification number: H01L29/42364 ,  H01L21/02109 ,  H01L21/02304 ,  H01L21/764 ,  H01L21/7682 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/40114 ,  H01L29/42324 ,  H01L29/66825

Abstract: A non-volatile memory device includes gate structures, an insulation layer pattern, and an isolation structure. Multiple gate structures being spaced apart from each other in a first direction are formed on a substrate. Ones of the gate structures extend in a second direction that is substantially perpendicular to the first direction. The substrate includes active regions and field regions alternately and repeatedly formed in the second direction. The insulation layer pattern is formed between the gate structures and has a second air gap therein. Each of the isolation structures extending in the first direction and having a first air gap between the gate structures, the insulation layer pattern, and the isolation structure is formed on the substrate in each field region.

Abstract translation: 非易失性存储器件包括栅极结构，绝缘层图案和隔离结构。 在第一方向上彼此间隔开的多个栅极结构形成在基板上。 栅极结构的一部分在基本上垂直于第一方向的第二方向上延伸。 衬底包括在第二方向上交替且重复地形成的有源区和场区。 绝缘层图案形成在栅极结构之间并且其中具有第二气隙。 在每个场区域的基板上形成有在第一方向上延伸并且在栅极结构之间具有第一空气间隙，绝缘层图案和隔离结构的隔离结构。

公开(公告)号：US20120080869A1

公开(公告)日：2012-04-05

申请号：US12956223

申请日：2010-11-30

Applicant: Chang Hyun Lee ,  Hyeong Ho Choi ,  Ki Dong Song

Inventor： Chang Hyun Lee ,  Hyeong Ho Choi ,  Ki Dong Song

IPC: B60R21/214 ,  B60R21/233 ,  B60R21/232

CPC classification number: B60R21/214 ,  B60R2021/23308

Abstract: A roof airbag apparatus for a vehicle may include an inflator generating pressurized gas, an airbag cushion provided between a roof of a vehicle body and a head-lining to expand downwards towards a passenger who may be sitting on a seat when the pressurized gas may be supplied to the airbag cushion from the inflator, and a support panel provided on a lower portion of the airbag cushion to contact and screen the passenger's face when the airbag cushion expands.

Abstract translation: 用于车辆的屋顶安全气囊装置可以包括产生加压气体的充气机，设置在车体顶部和头衬之间的气囊，以便当加压气体可能位于座椅上时可能坐在座椅上的乘客向下扩张 从充气机供给到气囊垫，以及设置在气囊垫的下部的支撑板，用于当气囊缓冲垫膨胀时接触和屏蔽乘客的脸部。

公开(公告)号：US08127516B2

公开(公告)日：2012-03-06

申请号：US12654572

申请日：2009-12-23

Applicant: Chang Hyun Lee ,  Jong Soo Woo ,  Hong Gi Yi ,  Kyeong Soo Kim ,  Ho Taek Yim

Inventor： Chang Hyun Lee ,  Jong Soo Woo ,  Hong Gi Yi ,  Kyeong Soo Kim ,  Ho Taek Yim

IPC: B65B63/08

CPC classification number: A61K9/0056 ,  A61J3/10 ,  A61K9/2095 ,  B30B11/02 ,  B30B11/08 ,  B65B9/042 ,  B65B9/045

Abstract: A method and packaging machine for preparing rapidly disintegrating formulations for oral administration are disclosed. The present invention is characterized in that a powdery mixture including a pharmaceutically active ingredient and a sugar or a sugar alcohol powder is filled into a packaging material and, thereafter, the mixture, filled in the packaging material, is heated. The present invention can simply and economically prepare an oral formulation which undergoes rapid disintegration in the oral cavity and provides for high-quality administration to patients.

Abstract translation: 公开了用于制备用于口服给药的快速崩解制剂的方法和包装机。 本发明的特征在于将包含药物活性成分和糖或糖醇粉末的粉末混合物填充到包装材料中，然后将填充在包装材料中的混合物加热。 本发明可以简单且经济地制备在口腔中快速崩解并提供给患者高质量给药的口服制剂。

公开(公告)号：US20110110161A1

公开(公告)日：2011-05-12

申请号：US13008181

申请日：2011-01-18

Applicant: Chang Hyun Lee

Inventor： Chang Hyun Lee

IPC: G11C16/10

CPC classification number: G11C16/3418 ,  G11C16/3427

Abstract: A non-volatile memory device includes an array of flash memory cells therein and a voltage generator. The voltage generator is configured to generate a program voltage (Vpgm), a pass voltage (Vpass), a blocking voltage (Vblock) and a decoupling voltage (Vdcp) during a flash memory programming operation. The blocking voltage is generated at a level that inhibits inadvertent programming of an unselected memory cell(s). This voltage level of the blocking voltage is set so that Vdcp

Abstract translation: 非易失性存储器件包括其中的闪存单元阵列和电压发生器。 电压发生器被配置为在闪速存储器编程操作期间产生编程电压（Vpgm），通过电压（Vpass），阻断电压（Vblock）和去耦电压（Vdcp）。 阻塞电压产生在抑制非选择存储单元的无意编程的水平。 该阻塞电压的电压电平被设定为使得Vdcp

公开(公告)号：US07927950B2

公开(公告)日：2011-04-19

申请号：US11672916

申请日：2007-02-08

Applicant: Han-Mei Choi ,  Chang-Hyun Lee ,  Seung-Hwan Lee ,  Young-Geun Park ,  Sung-Jung Kim ,  Young-Sun Kim

Inventor： Han-Mei Choi ,  Chang-Hyun Lee ,  Seung-Hwan Lee ,  Young-Geun Park ,  Sung-Jung Kim ,  Young-Sun Kim

IPC: H01L21/336

CPC classification number: H01L21/823462 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11568 ,  H01L27/11573

Abstract: A method of fabricating a floating trap type nonvolatile memory device includes forming a cell gate insulating layer on a semiconductor substrate, the cell gate insulating layer being comprised of a lower insulating layer, a charge storage layer and an upper insulating layer sequentially stacked; thermally annealing the cell gate insulating Layer at a temperature of approximately 810° C. to approximately 1370° C.; and forming a gate electrode on the thermally annealed cell gate insulating layer.

Abstract translation: 一种制造浮动阱型非易失性存储器件的方法包括：在半导体衬底上形成单元栅极绝缘层，所述栅极绝缘层由下层绝缘层，电荷存储层和上部绝缘层构成; 在大约810℃至大约137​​0℃的温度下对单元栅极绝缘层进行热退火; 以及在所述热退火单元栅极绝缘层上形成栅电极。

公开(公告)号：US07924622B2

公开(公告)日：2011-04-12

申请号：US11968753

申请日：2008-01-03

Applicant: Chang-Hyun Lee ,  Jung-Dal Choi ,  Byeong-In Choi

Inventor： Chang-Hyun Lee ,  Jung-Dal Choi ,  Byeong-In Choi

IPC: G11C16/28

CPC classification number: G11C16/06 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/30

Abstract: Integrated circuit flash memory devices, such as NAND flash memory devices, include an array of regular flash memory cells, an array of dummy flash memory cells and an erase controller. The erase controller is configured to concurrently apply a different predetermined bias voltage to the dummy flash memory cells than to the regular flash memory cells during an erase operation of the integrated circuit flash memory device. Related methods are also described.

Abstract translation: 诸如NAND闪存器件的集成电路闪存器件包括常规闪存单元阵列，虚拟闪存单元阵列和擦除控制器。 擦除控制器被配置为在集成电路快闪存储器件的擦除操作期间同时向虚拟闪存单元施加不同于常规闪存单元的预定偏置电压。 还描述了相关方法。

公开(公告)号：US20110069543A1

公开(公告)日：2011-03-24

申请号：US12956357

申请日：2010-11-30

Applicant: Chang-Hyun Lee ,  Jung-Dal Choi ,  Young-Ho Lim ,  Kang-Deong Suh

Inventor： Chang-Hyun Lee ,  Jung-Dal Choi ,  Young-Ho Lim ,  Kang-Deong Suh

IPC: G11C16/16 ,  G11C16/04

CPC classification number: G11C16/0483 ,  G11C16/16

Abstract: Methods of operating a charge trap nonvolatile memory device include operations to erase a first string of nonvolatile memory cells by selectively erasing even-numbered nonvolatile memory cells in the first string and then selectively erasing the odd-numbered nonvolatile memory cells in the first string, which may be interleaved with the even-numbered nonvolatile memory cells. This operation to selectively erase the even-numbered nonvolatile memory cells may include erasing the even-numbered nonvolatile memory cells while simultaneously biasing the odd-numbered nonvolatile memory cells in a blocking condition that inhibits erasure of the odd-numbered nonvolatile memory cells. The operation to selectively erase the odd-numbered nonvolatile memory cells may include erasing the odd-numbered nonvolatile memory cells while simultaneously biasing the even-numbered nonvolatile memory cells in a blocking condition that inhibits erasure of the even-numbered nonvolatile memory cells.

Abstract translation: 操作电荷阱非易失性存储装置的方法包括通过选择性地擦除第一串中的偶数非易失性存储单元然后选择性地擦除第一串中的奇数非易失性存储单元来擦除第一串非易失性存储单元的操作， 可以与偶数非易失性存储单元进行交织。 选择性地擦除偶数非易失性存储单元的操作可以包括擦除偶数非易失性存储单元，同时在禁止奇数非易失性存储单元擦除的阻塞状态下同时偏置奇数非易失性存储单元。 选择性地擦除奇数非易失性存储单元的操作可以包括擦除奇数非易失性存储单元，同时在阻止偶数非易失性存储单元擦除的阻塞状态下同时偏置偶数非易失性存储单元。