Abstract:
An integrated circuit capable of operating despite a profile shift is disclosed. Overlay marks on the integrated circuit are surrounded by a trench that tends to relieve the effect of a profile shift caused by stress applied to the integrated circuit. The position of the overlay marks tends, therefore, not to be affected by the stress.
Abstract:
An ESD-resistant photomask and method of preventing mask ESD damage is disclosed. The ESD-resistant photomask includes a mask substrate, a pattern-forming material provided on the substrate, a circuit pattern defined by exposure regions etched in the pattern-forming material, and positive or negative ions implanted into the mask substrate throughout ion implantation regions. The ions in the ion implantation regions dissipate electrostatic charges on the mask, thus preventing the buildup of electrostatic charges which could otherwise attract image-distorting particles to the mask or damage the mask.
Abstract:
A megasonic immersion lithography exposure apparatus and method for substantially eliminating microbubbles from an exposure liquid in immersion lithography is disclosed. The apparatus includes an optical system for projecting light through a mask and onto a wafer.An optical transfer chamber is provided adjacent to the optical system for containing an exposure liquid. At least one megasonic plate operably engages the optical transfer chamber for inducing sonic waves in and eliminating microbubbles from the exposure liquid.
Abstract:
An optical proximity correction photomask comprises a transparent substrate, a main feature having a first transmitivity disposed on the transparent substrate and at least one assist feature having a second transmitivity disposed beside the main feature and on the transparent substrate, wherein the first transmitivity is not equal to the second transmitivity.
Abstract:
An integrated circuit in which measurement of the alignment between subsequent layers has less susceptibility to stress induced shift. A first layer of the structure has a first overlay mark. A second and/or a third layer are formed in the alignment structure and on the first layer. Portions of the second and/or third layer are selectively removed from regions in and around the first overlay mark. A second overlay mark is formed and aligned to the first overlay mark. The alignment between the second overlay mark and first overlay mark may be measured with an attenuated error due to reflection and refraction or due to an edge profile shift of the first overlay mark.
Abstract:
A method of lithography patterning includes forming a first material layer on a substrate, the first material layer being substantially free of silicon, and forming a patterned resist layer including at least one opening therein above the first material layer. A second material layer containing silicon is formed on the patterned resist layer and an opening is formed in the first material layer using the second material layer as a mask.
Abstract:
An anti-reflective coating comprises a plurality of main backbone chains, and at least one long free polymer chain coupled to at least one of the plurality of main backbone chains.
Abstract:
A shallow trench isolation structure has a trench formed in a substrate, a silicon oxynitride layer conformally formed on the sidewalls and bottom of the trench, and a high density plasma (HDP) oxide layer substantially filling the trench.
Abstract:
A method of performing immersion lithography on a semiconductor substrate includes providing a layer of resist onto a surface of the semiconductor substrate and exposing the resist layer using an immersion lithography exposure system. The immersion lithography exposure system utilizes a fluid during exposure and may be capable of removing some, but not all, of the fluid after exposure. After exposure, a treatment process is used to remove the remaining portion of fluid from the resist layer. After treatment, a post-exposure bake and a development step are used.
Abstract:
A method for forming a semiconductor device includes forming a photoresist layer over a substrate and patterning the photoresist layer to form photoresist portions. A second layer is formed over the substrate in areas not covered by the photoresist portions and the photoresist portions are removed. After removing the photoresist portions, the second layer is used to modify the substrate to create at least a portion of the semiconductor device.