公开(公告)号：US09464650B2

公开(公告)日：2016-10-11

申请号：US14990521

申请日：2016-01-07

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F16B7/14

CPC classification number: F16B7/1418

Abstract: A fastening device for mounting on a tube includes: a tubular sleeve member adapted to be sleeved around the tube, defining a reception space to snugly receiving the tube and a notch for access into the reception space and having an inner wall surface defining the reception space and formed with a press element; and a fixing element mounted on the sleeve member at the notch such that tightening of the fixing element relative to the sleeve member results in pressing of the press element against the tube to deform the tube to possess an outwardly minor protrusion for abutting against the fixing element, which creates an inwardly dented minor recess on its outer wall surface of the tube.

Abstract translation: 用于安装在管上的紧固装置包括：管状套筒构件，其适于围绕管套管，限定用于紧密地接收管的接收空间和用于进入接收空间的凹口，并具有限定接收空间的内壁表面 并形成有压力元件; 以及固定元件，其在凹口处安装在套筒构件上，使得固定元件相对于套筒构件的紧固导致压力元件压靠在管上以使管变形以具有用于抵靠固定元件的向外的小突起 ，其在其外壁表面上产生向内凹入的小凹部。

公开(公告)号：US09151472B2

公开(公告)日：2015-10-06

申请号：US14139788

申请日：2013-12-23

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F21V1/06 ,  F21V15/01 ,  F21V7/22

CPC classification number: F21V15/01 ,  F21V7/16 ,  F21V7/22 ,  F21W2131/406

Abstract: A light cover capable of adjusting the amount of light emitted is provided in the present invention. The light cover includes a cloth, a supporting frame and a binding member. The supporting frame includes three/four intersecting elastic supporting rods. A light emitting opening and a triangular/square mounting portion are formed by assembling the cloth with the three/four intersecting elastic supporting rods. The binding member is assembled with both ends of each of the three/four elastic supporting rods. By tightening the binding member around the ends of the three/four elastic supporting rods, the three/four intersecting elastic supporting rods are bent into different curvatures, thereby adjusting the size of the light emitting opening.

Abstract translation: 本发明提供了能够调节发光量的灯罩。 灯罩包括布，支撑框架和装订构件。 支撑框架包括三个/四个相交的弹性支撑杆。 通过将布与三个/四个相交的弹性支撑棒组装来形成发光开口和三角/正方形安装部。 装订构件与三/四个弹性支撑杆中的每一个的两端组装。 通过在三/四个弹性支撑杆的端部周围紧固装订构件，将三个/四个相交的弹性支撑杆弯曲成不同的曲率，从而调节发光开口的尺寸。

公开(公告)号：US08877623B2

公开(公告)日：2014-11-04

申请号：US13471128

申请日：2012-05-14

Applicant: Shih-Hung Tsai ,  Ssu-I Fu ,  Ying-Tsung Chen ,  Chih-Wei Chen ,  Chien-Ting Lin ,  Wen-Tai Chiang

Inventor： Shih-Hung Tsai ,  Ssu-I Fu ,  Ying-Tsung Chen ,  Chih-Wei Chen ,  Chien-Ting Lin ,  Wen-Tai Chiang

IPC: H01L21/3205

CPC classification number: H01L29/6681 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/283 ,  H01L21/76224 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/785

Abstract: A method of forming a semiconductor device is provided. A first interfacial material layer is formed by a deposition process on a substrate. A dummy gate material layer is formed on the first interfacial material layer. The dummy gate material layer and the first interfacial material layer are patterned to form a stacked structure. An interlayer dielectric (ILD) layer is formed to cover the stacked structure. A portion of the ILD layer is removed to expose a top of the stacked structure. The stacked structure is removed to form a trench in the ILD layer. A second interfacial layer and a first high-k layer are conformally formed at least on a surface of the trench. A composite metal layer is formed to at least fill up the trench.

Abstract translation: 提供一种形成半导体器件的方法。 通过在衬底上的沉积工艺形成第一界面材料层。 在第一界面材料层上形成虚拟栅极材料层。 将虚拟栅材料层和第一界面材料层图案化以形成堆叠结构。 形成层间电介质（ILD）层以覆盖层叠结构。 去除ILD层的一部分以露出堆叠结构的顶部。 去除层叠结构以在ILD层中形成沟槽。 至少在沟槽的表面上共形地形成第二界面层和第一高k层。 复合金属层形成为至少填充沟槽。

公开(公告)号：US08802524B2

公开(公告)日：2014-08-12

申请号：US13053223

申请日：2011-03-22

Applicant: Po-Jui Liao ,  Tsung-Lung Tsai ,  Chien-Ting Lin ,  Shao-Hua Hsu ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Chan-Lon Yang ,  Chun-Yuan Wu ,  Teng-Chun Tsai ,  Guang-Yaw Hwang ,  Chia-Lin Hsu ,  Jie-Ning Yang ,  Cheng-Guo Chen ,  Jung-Tsung Tseng ,  Zhi-Cheng Lee ,  Hung-Ling Shih ,  Po-Cheng Huang ,  Yi-Wen Chen ,  Che-Hua Hsu

Inventor： Po-Jui Liao ,  Tsung-Lung Tsai ,  Chien-Ting Lin ,  Shao-Hua Hsu ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Chan-Lon Yang ,  Chun-Yuan Wu ,  Teng-Chun Tsai ,  Guang-Yaw Hwang ,  Chia-Lin Hsu ,  Jie-Ning Yang ,  Cheng-Guo Chen ,  Jung-Tsung Tseng ,  Zhi-Cheng Lee ,  Hung-Ling Shih ,  Po-Cheng Huang ,  Yi-Wen Chen ,  Che-Hua Hsu

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823842 ,  H01L21/823807 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7833

Abstract: The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.

Abstract translation: 本发明提供一种制造具有金属栅极的半导体器件的方法。 首先，提供基板。 具有第一牺牲栅极的第一导电型晶体管和具有第二牺牲栅极的第二导电型晶体管设置在衬底上。 去除第一牺牲栅极以形成第一沟槽。 然后，在第一沟槽中形成第一金属层。 去除第二牺牲栅极以形成第二沟槽。 接下来，在第一沟槽和第二沟槽中形成第二金属层。 最后，在第二金属层上形成第三金属层，其中第三金属层被填充到第一沟槽和第二沟槽中。

公开(公告)号：US08704294B2

公开(公告)日：2014-04-22

申请号：US13158479

申请日：2011-06-13

Applicant: Po-Jui Liao ,  Tsung-Lung Tsai ,  Chien-Ting Lin ,  Shao-Hua Hsu ,  Yeng-Peng Wang ,  Chun-Hsien Lin ,  Chan-Lon Yang ,  Guang-Yaw Hwang ,  Shin-Chi Chen ,  Hung-Ling Shih ,  Jiunn-Hsiung Liao ,  Chia-Wen Liang

Inventor： Po-Jui Liao ,  Tsung-Lung Tsai ,  Chien-Ting Lin ,  Shao-Hua Hsu ,  Yeng-Peng Wang ,  Chun-Hsien Lin ,  Chan-Lon Yang ,  Guang-Yaw Hwang ,  Shin-Chi Chen ,  Hung-Ling Shih ,  Jiunn-Hsiung Liao ,  Chia-Wen Liang

IPC: H01L29/66

CPC classification number: H01L29/78 ,  H01L21/823842 ,  H01L21/82385 ,  H01L29/66545

Abstract: A method of manufacturing a semiconductor device having metal gate includes providing a substrate having a first transistor and a second transistor formed thereon, the first transistor having a first gate trench formed therein, forming a first work function metal layer in the first gate trench, forming a sacrificial masking layer in the first gate trench, removing a portion of the sacrificial masking layer to expose a portion of the first work function metal layer, removing the exposed first function metal layer to form a U-shaped work function metal layer in the first gate trench, and removing the sacrificial masking layer. The first transistor includes a first conductivity type and the second transistor includes a second conductivity type. The first conductivity type and the second conductivity type are complementary.

Abstract translation: 一种制造具有金属栅极的半导体器件的方法包括：提供具有形成在其上的第一晶体管和第二晶体管的衬底，所述第一晶体管具有形成在其中的第一栅极沟槽，在所述第一栅极沟槽中形成第一功函数金属层， 在第一栅极沟槽中的牺牲掩模层，去除牺牲掩模层的一部分以暴露第一功函数金属层的一部分，去除暴露的第一功能金属层，以在第一栅极沟槽中的第一栅极沟槽中形成U形功函数金属层 栅极沟槽，以及去除牺牲掩模层。 第一晶体管包括第一导电类型，第二晶体管包括第二导电类型。 第一导电类型和第二导电类型是互补的。

公开(公告)号：US08662002B2

公开(公告)日：2014-03-04

申请号：US13190465

申请日：2011-07-25

Applicant: Chien-Ting Lin

Inventor： Chien-Ting Lin

IPC: F16M11/28 ,  G08B3/00 ,  G08B5/00

CPC classification number: F16M11/28 ,  F16M2200/065 ,  G08B21/00

Abstract: A retractable post assembly with alarm function is disclosed. The retractable post assembly includes: a stationary post being a column member; a moveable post being a column member and moveably sleeved with the stationary post; and an alarm device, such as an air whistle, an electrically-controlled buzzer unit, and an electrically-controlled alarm lamp unit, installed in the retractable post assembly at a proper location. When the moveable post is making a relative movement with respect to the stationary post, the alarm device senses the movement and raises an alarm accordingly.

Abstract translation: 公开了一种具有报警功能的可伸缩柱组件。 可伸缩柱组件包括：固定柱，为柱构件; 可移动的柱是柱构件并且可移动地与固定柱套管; 以及安装在适当位置的可伸缩柱组件中的报警装置，例如空气哨子，电控蜂鸣器单元和电控报警灯单元。 当可移动柱相对于固定柱进行相对运动时，报警装置感测到运动并相应地引起报警。

公开(公告)号：US20140035066A1

公开(公告)日：2014-02-06

申请号：US13562322

申请日：2012-07-31

Applicant: Shih-Hung Tsai ,  Ssu-I Fu ,  Ying-Tsung Chen ,  Chih-Wei Chen ,  Ying-Chih Lin ,  Chien-Ting Lin ,  Hsuan-Hsu Chen

Inventor： Shih-Hung Tsai ,  Ssu-I Fu ,  Ying-Tsung Chen ,  Chih-Wei Chen ,  Ying-Chih Lin ,  Chien-Ting Lin ,  Hsuan-Hsu Chen

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/66795 ,  H01L29/51 ,  H01L29/66818 ,  H01L29/785

Abstract: The present invention provides a non-planar FET which includes a substrate, a fin structure, a sub spacer, a gate, a dielectric layer and a source/drain region. The fin structure is disposed on the substrate. The sub spacer is disposed only on a middle sidewall of the fin structure. The gate is disposed on the fin structure. The dielectric layer is disposed between the fin structure and the gate. The source/drain region is disposed in the fin structure. The present invention further provides a method of forming the same.

Abstract translation: 本发明提供一种非平面FET，其包括基板，鳍结构，子间隔物，栅极，电介质层和源极/漏极区域。 翅片结构设置在基板上。 子间隔件仅设置在翅片结构的中间侧壁上。 门设置在翅片结构上。 介电层设置在翅片结构和栅极之间。 源/漏区设置在鳍结构中。 本发明还提供一种形成该方法的方法。

公开(公告)号：US20130203230A1

公开(公告)日：2013-08-08

申请号：US13367376

申请日：2012-02-07

Applicant: Ying-Tsung Chen ,  Chien-Ting Lin ,  Ssu-I Fu ,  Shih-Hung Tsai ,  Wen-Tai Chiang ,  Chih-Wei Chen ,  Chiu-Hsien Yeh ,  Shao-Wei Wang ,  Kai-Ping Wang

Inventor： Ying-Tsung Chen ,  Chien-Ting Lin ,  Ssu-I Fu ,  Shih-Hung Tsai ,  Wen-Tai Chiang ,  Chih-Wei Chen ,  Chiu-Hsien Yeh ,  Shao-Wei Wang ,  Kai-Ping Wang

IPC: H01L21/336

CPC classification number: H01L29/66477 ,  H01L21/28185 ,  H01L29/51 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/7833

Abstract: A semiconductor process includes the following steps. A substrate is provided. An ozone saturated deionized water process is performed to form an oxide layer on the substrate. A dielectric layer is formed on the oxide layer. A post dielectric annealing (PDA) process is performed on the dielectric layer and the oxide layer.

Abstract translation: 半导体工艺包括以下步骤。 提供基板。 进行臭氧饱和去离子水处理以在衬底上形成氧化物层。 在氧化物层上形成介电层。 在电介质层和氧化物层上进行后介电退火（PDA）工艺。

公开(公告)号：US20130154012A1

公开(公告)日：2013-06-20

申请号：US13326342

申请日：2011-12-15

Applicant: Ssu-I Fu ,  Wen-Tai Chiang ,  Ying-Tsung Chen ,  Shih-Hung Tsai ,  Chien-Ting Lin ,  Chi-Mao Hsu ,  Chin-Fu Lin

Inventor： Ssu-I Fu ,  Wen-Tai Chiang ,  Ying-Tsung Chen ,  Shih-Hung Tsai ,  Chien-Ting Lin ,  Chi-Mao Hsu ,  Chin-Fu Lin

IPC: H01L27/088 ,  H01L21/28

CPC classification number: H01L21/28114 ,  H01L21/28088 ,  H01L21/823828 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

Abstract: A manufacturing method for semiconductor device having metal gate includes providing a substrate having a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device having a first gate trench and the second semiconductor device having a second gate trench; sequentially forming a high dielectric constant (high-k) gate dielectric layer and a multiple metal layer on the substrate; forming a first work function metal layer in the first gate trench; performing a first pull back step to remove a portion of the first work function metal layer from the first gate trench; forming a second work function metal layer in the first gate trench and the second gate trench; and performing a second pull back step to remove a portion of the second work function metal layer from the first gate trench and the second gate trench.

Abstract translation: 具有金属栅极的半导体器件的制造方法包括提供具有第一半导体器件和形成在其上的第二半导体器件的衬底，所述第一半导体器件具有第一栅极沟槽，所述第二半导体器件具有第二栅极沟槽; 在基板上依次形成高介电常数（高k）栅介质层和多金属层; 在所述第一栅极沟槽中形成第一功函数金属层; 执行第一拉回步骤以从所述第一栅极沟槽去除所述第一功函数金属层的一部分; 在所述第一栅极沟槽和所述第二栅极沟槽中形成第二功函数金属层; 以及执行第二拉回步骤以从所述第一栅极沟槽和所述第二栅极沟槽去除所述第二功函数金属层的一部分。

公开(公告)号：US08441072B2

公开(公告)日：2013-05-14

申请号：US13224344

申请日：2011-09-02

Applicant: Shih-Hung Tsai ,  Chien-Ting Lin ,  Chin-Cheng Chien ,  Chin-Fu Lin ,  Chih-Chien Liu ,  Teng-Chun Tsai ,  Chun-Yuan Wu

Inventor： Shih-Hung Tsai ,  Chien-Ting Lin ,  Chin-Cheng Chien ,  Chin-Fu Lin ,  Chih-Chien Liu ,  Teng-Chun Tsai ,  Chun-Yuan Wu

IPC: H01L27/12

CPC classification number: H01L29/785 ,  H01L29/66795

Abstract: A non-planar semiconductor structure includes a substrate, at least two fin-shaped structures, at least an isolation structure, and a plurality of epitaxial layers. The fin-shaped structures are located on the substrate. The isolation structure is located between the fin-shaped structures, and the isolation structure has a nitrogen-containing layer. The epitaxial layers respectively cover a part of the fin-shaped structures and are located on the nitrogen-containing layer. A non-planar semiconductor process is also provided for forming the semiconductor structure.

Abstract translation: 非平面半导体结构包括衬底，至少两个鳍状结构，至少一个隔离结构和多个外延层。 鳍状结构位于基底上。 隔离结构位于鳍状结构之间，隔离结构具有含氮层。 外延层分别覆盖了鳍状结构的一部分并且位于含氮层上。 还提供了用于形成半导体结构的非平面半导体工艺。