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公开(公告)号：US20240168797A1
公开(公告)日：2024-05-23
申请号：US17988812
申请日：2022-11-17
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Wojciech Wasko , Dotan David Levi , Harsha Deepak Banuli Nanje Gowda , Natan Manevich , Daniel Marcovitch
CPC classification number: G06F9/4881 , G06F1/12 , G06F13/405
Abstract: In one embodiment, a system includes a peripheral data connection bus configured to connect to devices and transfer data between the devices, a scheduling machine configured to connect to the peripheral data connection bus and send a read request message to a first processing device, and the first processing device configured to be connected to the peripheral data connection bus, and responsively to the read request message add a time value to a read response message, and provide the read response message to the scheduling machine, and wherein the scheduling machine is configured to read the time value from the provided read response message and schedule processing of an operation by a second processing device responsively to the read time value.
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公开(公告)号：US20240154783A1
公开(公告)日：2024-05-09
申请号：US17983427
申请日：2022-11-09
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Dotan David Levi , Wojciech Wasko
CPC classification number: H04L7/0008 , H04L7/06 , H04L47/6225
Abstract: In one embodiment, a system includes a network interface controller to receive a first clock-synchronization message from a clock-synchronization leader device and send a second clock-synchronization messages to at least one clock-synchronization follower device, and a processor to execute software to generate the second clock-synchronization message, and generate a control dependency to condition sending the second clock-synchronization message by the network interface controller to the at least one clock-synchronization follower device on the network interface controller receiving the first clock-synchronization message from the clock-synchronization leader device.
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公开(公告)号：US20240154712A1
公开(公告)日：2024-05-09
申请号：US18415883
申请日：2024-01-18
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Bar Shapira , Ariel Almog , Dotan David Levi , Natan Manevich , Thomas Kernen , Liron Mula
IPC: H04J3/06
CPC classification number: H04J3/0638
Abstract: A system for maintaining a Precision Time Protocol (PTP) hardware clock, the system being operative in conjunction with a network device which is external to the system, the system comprising a controller to receive information characterizing a network peer oscillator frequency, wherein the information was extracted from an RX symbol rate, and to adjust the PTP Hardware Clock's frequency responsive to the information characterizing the network peer oscillator frequency.
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公开(公告)号：US11934332B2
公开(公告)日：2024-03-19
申请号：US17590339
申请日：2022-02-01
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Daniel Marcovitch , Dotan David Levi , Eyal Srebro , Eliel Peretz , Roee Moyal , Richard Graham , Gil Bloch , Sean Pieper
Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.
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公开(公告)号：US20240089077A1
公开(公告)日：2024-03-14
申请号：US17942899
申请日：2022-09-12
Applicant: Mellanox Technologies, Ltd.
Inventor： Wojciech Wasko , Dotan David Levi , Natan Manevich , Maciek Machnikowski
CPC classification number: H04L7/0091 , H04L12/1881
Abstract: A network interface device includes a local register and packet processing circuitry coupled to the local register. The packet processing circuitry is to: capture a network packet transmitted by a software application running on an integrated computing system; capture, at time of transmission of the network packet, a value of a physical clock as a receive timestamp for subscriber entities that are running on the integrated computing system; store the receive timestamp in the local register; associate the receive timestamp from the local register with a first packet copy of the network packet; insert the first packet copy to a first receive pipeline of a first subscriber entity; associate the receive timestamp from the local register with a second packet copy of the network packet; and insert the second packet copy to a second receive pipeline of a second subscriber entity.
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Patent Agency Ranking
公开(公告)号：US11917045B2
公开(公告)日：2024-02-27
申请号：US17871937
申请日：2022-07-24
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Dotan David Levi , Arnon Sattinger , Natan Manevich , Wojciech Wasko , Ariel Almog , Bar Or Shapira
CPC classification number: H04L7/0012
Abstract: In one embodiment, a communication system includes network devices, each comprising a network interface to receive at least one data stream, a given network device being configured to recover a remote clock from the at least one data stream received by the given network device, a frequency synthesizer to generate a clock signal and output the clock signal to each of the network devices, wherein the given network device is configured to find a clock frequency differential between the clock signal and the recovered remote clock, and provide a control signal to the frequency synthesizer responsively to the clock frequency differential, the control signal causes the frequency synthesizer to adjust the clock signal so as to iteratively reduce an absolute value of the clock frequency differential between the clock signal and the recovered remote clock.
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公开(公告)号：US20240056400A1
公开(公告)日：2024-02-15
申请号：US17886606
申请日：2022-08-12
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Zsolt Alon Wertheimer , Omer Shabtai , Barak Goldberg , Lion Levi , Gil Mey-Tal , Bar Or Shapira , Dotan David Levi
IPC: H04L47/56 , H04L43/0894
CPC classification number: H04L47/56 , H04L43/0894
Abstract: Systems, methods, and devices that perform computing operations are provided. In one example, a system includes a least one node, the at least one node having one or more processors, each having associated memory, a clock, a scheduler, the scheduler monitoring one or more of rates, rates of lanes, rates at which packets are sent, times, latencies of packets, topology, communication states, nodes, and packets in the system, an attribute monitor that measures counters for one or more of congestion state, line rate, and communication attributes. A packet scheduler determines a destination node based on information from the scheduler and the attribute monitor, and sends at least a portion of a packet to the destination node.
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公开(公告)号：US11876885B2
公开(公告)日：2024-01-16
申请号：US17335122
申请日：2021-06-01
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Dotan David Levi , Ariel Shahar , Shahaf Shuler , Ariel Almog , Eitan Hirshberg , Natan Manevich
IPC: H04L7/00
CPC classification number: H04L7/0091
Abstract: A timing system including timing circuitry which includes an arming queue, a clock work queue, and a clock completion queue. At least the clock work queue is to provide timing information, and the arming queue is to arm the clock work queue. Related apparatus and methods are also provided.
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公开(公告)号：US20240015419A1
公开(公告)日：2024-01-11
申请号：US17869932
申请日：2022-07-21
Applicant: Mellanox Technologies, Ltd.
Inventor： Ioannis (Giannis) Patronas , Dotan David Levi , Wojciech Wasko , Paraskevas Bakopoulos , Dimitrios Syrivelis , Elad Mentovich
IPC: H04Q11/00 , H04B10/2575
CPC classification number: H04Q11/0005 , H04B10/25753 , H04Q2011/0045 , H04Q2011/005
Abstract: Network devices and associated methods are provided for synchronization in an optically switched network. The network device includes one or more ports in communication with a plurality of devices via an optical switch. The one or more ports receive a master clock signal having a first frequency from a first device of the plurality of devices. The network device includes a local clock in communication with the one or more ports and operating at a second frequency. The network device includes a synchronization manager in communication with the one or more ports and the local clock and configured to be enabled and disabled. When the synchronization manager is enabled, it receives the master clock signal via the one or more ports and transmits an instruction to the local clock to operate at the first frequency.
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公开(公告)号：US20230370305A1
公开(公告)日：2023-11-16
申请号：US17885604
申请日：2022-08-11
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor： Natan Manevich , Dotan David Levi , Wojciech Wasko , Ariel Almog , Bar Shapira
CPC classification number: H04L12/422 , G06F1/10 , H04J3/0667 , H04L12/43
Abstract: In one embodiment, a synchronized communication system includes a plurality of network devices, and clock connections to connect the network devices in a closed loop configuration, wherein the network devices are configured to distribute among the network devices a reference clock time from any selected one of the network devices.
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