Calibration circuit of a frequency generator, and compensation circuit thereof
    121.
    发明授权
    Calibration circuit of a frequency generator, and compensation circuit thereof 有权
    频率发生器的校准电路及其补偿电路

    公开(公告)号:US08736389B2

    公开(公告)日:2014-05-27

    申请号:US13234108

    申请日:2011-09-15

    CPC classification number: H03L1/023 H03L1/028

    Abstract: A calibration circuit includes at least two compensation circuits and a comparator. The at least two compensation circuits are coupled to an input signal for outputting at least a first compensation signal and a second compensation signal respectively. The comparator is coupled to the first compensation signal and the second compensation signal for outputting a calibration signal, where the calibration signal is used for determining an oscillation frequency of a crystal oscillator to achieve a purpose of frequency compensation with a temperature.

    Abstract translation: 校准电路包括至少两个补偿电路和比较器。 所述至少两个补偿电路被耦合到输入信号,以分别输出至少第一补偿信号和第二补偿信号。 比较器耦合到第一补偿信号和第二补偿信号,用于输出校准信号,其中校准信号用于确定晶体振荡器的振荡频率以实现温度频率补偿的目的。

    Compound semiconductor device and method for fabricating the same
    122.
    发明授权
    Compound semiconductor device and method for fabricating the same 有权
    化合物半导体器件及其制造方法

    公开(公告)号:US08580627B2

    公开(公告)日:2013-11-12

    申请号:US12967289

    申请日:2010-12-14

    CPC classification number: H01L29/92 H01L27/0605 H01L29/20 H01L29/8605

    Abstract: A compound semiconductor device is provided, including a gallium arsenide (GaAs) substrate having a first protrusion portion and a second protrusion portion, wherein the first protrusion portion is formed over a first portion of the GaAs substrate and the second protrusion is formed over a second portion of the GaAs substrate. A first element is disposed over the first protrusion portion, and a second element is disposed over the second protrusion portion.

    Abstract translation: 提供了一种化合物半导体器件,其包括具有第一突出部分和第二突出部分的砷化镓(GaAs)衬底,其中第一突出部分形成在GaAs衬底的第一部分上,并且第二突起形成在第二突起部分上 部分GaAs衬底。 第一元件设置在第一突出部分上方,第二元件设置在第二突起部分上。

    Frequency modulation receiver and receiving method thereof
    123.
    发明授权
    Frequency modulation receiver and receiving method thereof 有权
    频率调制接收机及其接收方法

    公开(公告)号:US08509717B2

    公开(公告)日:2013-08-13

    申请号:US12619960

    申请日:2009-11-17

    Inventor: Huei-Chiang Shiu

    CPC classification number: H04B1/1653

    Abstract: A frequency modulation receiver is provided. The frequency modulation receiver includes an automatic frequency controller and a signal detector. The automatic frequency controller receives a demodulated frequency modulation signal demodulated from a radio frequency signal and outputs a control voltage to control an oscillation frequency of a local oscillator. The signal detector coupled to the automatic frequency controller receives the control voltage and determines whether the radio frequency signal is a frequency modulation signal according to the control voltage and a predetermined voltage range.

    Abstract translation: 提供了一种调频接收机。 调频接收机包括自动频率控制器和信号检测器。 自动频率控制器接收从射频信号解调的解调频率调制信号,并输出控制电压以控制本地振荡器的振荡频率。 耦合到自动频率控制器的信号检测器接收控制电压,并根据控制电压和预定电压范围确定射频信号是否是频率调制信号。

    Power detector
    124.
    发明授权
    Power detector 有权
    功率检测器

    公开(公告)号:US08471549B2

    公开(公告)日:2013-06-25

    申请号:US12776420

    申请日:2010-05-09

    Applicant: Chih-Wei Chen

    Inventor: Chih-Wei Chen

    Abstract: A power detector circuit for measuring output power of an amplifier circuit includes a mirror amplification stage having mirror circuit components substantially similar and corresponding to original circuit components of an amplification stage of the amplifier circuit, and a power sensor circuit coupled to an output node of the mirror amplification stage.

    Abstract translation: 用于测量放大器电路的输出功率的功率检测器电路包括镜像放大级,该反射镜放大级具有基本上相似并且对应于放大器电路的放大级的原始电路部件的镜像电路部件,以及耦合到该放大器电路的输出节点的功率传感器电路 镜像放大级。

    Asynchronous first in first out interface, method thereof and integrated receiver
    126.
    发明授权
    Asynchronous first in first out interface, method thereof and integrated receiver 有权
    先进先出的接口及其接收方法

    公开(公告)号:US08346201B2

    公开(公告)日:2013-01-01

    申请号:US12763281

    申请日:2010-04-20

    Applicant: Tse-Peng Chen

    Inventor: Tse-Peng Chen

    Abstract: An asynchronous FIFO interface having a readout clock asynchronous with a write clock is provided. The asynchronous FIFO interface includes a FIFO buffer, a clock controller, a reference source and a signal source. The FIFO buffer receives a digital signal from an ADC according to the write clock and outputs a digital signal to a processor according to the readout clock. The clock controller outputs a clock control signal according to the amount of data stored in the FIFO buffer. The reference source provides an oscillation frequency. The signal source divides the oscillation frequency by a first integer divisor to generate a reference frequency, divides the readout clock by a second integer divisor to generate an input frequency, and outputs a control signal by comparing the reference frequency with the input frequency.

    Abstract translation: 提供了具有与写时钟异步的读出时钟的异步FIFO接口。 异步FIFO接口包括FIFO缓冲器,时钟控制器,参考源和信号源。 FIFO缓冲器根据写时钟从ADC接收数字信号,并根据读出时钟将数字信号输出到处理器。 时钟控制器根据存储在FIFO缓冲器中的数据量输出时钟控制信号。 参考源提供振荡频率。 信号源将振荡频率除以第一整数除数以产生参考频率,将读出时钟除以第二整数除数以产生输入频率,并通过将参考频率与输入频率进行比较来输出控制信号。

    COMMUNICATION SYSTEM FOR FREQUENCY SHIFT KEYING SIGNAL
    127.
    发明申请
    COMMUNICATION SYSTEM FOR FREQUENCY SHIFT KEYING SIGNAL 有权
    用于频移键控信号的通信系统

    公开(公告)号:US20120326908A1

    公开(公告)日:2012-12-27

    申请号:US13329751

    申请日:2011-12-19

    CPC classification number: H04L27/122

    Abstract: A communication system includes a time-to-digital converter, a digital low-pass filter, and a digital signal processor. The time-to-digital converter receives an in-phase signal of a frequency-shift keying signal and to generate a digital signal according to the in-phase signal. The digital low-pass filter receives the digital signal and to generate a filtered signal including N continuous words according to the digital signal. The digital signal processor divides up the N continuous words into N/2 word sets in order, wherein each of the N/2 word sets includes a first word and a second word, and if a difference between the first word and the second word meets a predetermined condition, the digital signal processor generates an output data and an output clock according to all the first words and the second words that have difference which meets the predetermined condition.

    Abstract translation: 通信系统包括时间 - 数字转换器,数字低通滤波器和数字信号处理器。 时间 - 数字转换器接收频移键控信号的同相信号,并根据同相信号产生数字信号。 数字低通滤波器接收数字信号并根据数字信号产生包括N个连续字的滤波信号。 数字信号处理器按顺序将N个连续字分成N / 2个字组,其中N / 2个字组中的每一个包括第一个字和第二个字,并且如果第一个字和第二个字之间的差值满足 在预定条件下,数字信号处理器根据满足预定条件的所有第一个字和第二个字产生一个输出数据和一个输出时钟。

    Phase lock loop and control method thereof
    128.
    发明授权
    Phase lock loop and control method thereof 有权
    锁相环及其控制方法

    公开(公告)号:US08248121B2

    公开(公告)日:2012-08-21

    申请号:US12729294

    申请日:2010-03-23

    Applicant: Wei-Jie Lee

    Inventor: Wei-Jie Lee

    Abstract: A phase lock loop (PLL) featuring automatic stabilization is provided, in which a first charge pump is coupled to a driving control signal to generate a first current, a filter with a zero-point path and the first charge pump are coupled at a first node, and a current adjustment circuit adjusts a current on the first node according to a voltage difference in the zero-point path.

    Abstract translation: 提供了一种具有自动稳定功能的锁相环(PLL),其中第一电荷泵耦合到驱动控制信号以产生第一电流,具有零点路径的滤波器和第一电荷泵在第一 节点,并且电流调节电路根据零点路径中的电压差来调整第一节点上的电流。

    Apparatus and Method for Digitally Controlling Capacitance
    130.
    发明申请
    Apparatus and Method for Digitally Controlling Capacitance 有权
    数字控制电容的装置和方法

    公开(公告)号:US20110319036A1

    公开(公告)日:2011-12-29

    申请号:US12821489

    申请日:2010-06-23

    Applicant: Chen Tse-Peng

    Inventor: Chen Tse-Peng

    Abstract: An oscillator circuit having a source of an oscillating signal, a tank circuit including an inductor and a capacitor, and a discretely switchable capacitance module configured to control an amount of capacitance in the oscillator circuit. The discretely switchable capacitance module includes, in one embodiment, a capacitor coupled between a first node and a second node, a switch, having a control node, coupled between the second node and a third node; and a DC feed circuit, having a first end coupled to the second node and a second end configured to receive a first or second control signal. The control node of the switch is tied to a predetermined bias voltage. When the first control signal is applied, the capacitor is coupled between the first node and the third node via the switch such that the capacitor is coupled in parallel with the capacitor of the tank circuit, and when the second control signal is applied the capacitor is decoupled from the tank circuit.

    Abstract translation: 具有振荡信号源的振荡器电路,包括电感器和电容器的振荡电路以及被配置为控制振荡器电路中的电容量的离散可切换电容模块。 在一个实施例中,离散可切换电容模块包括耦合在第一节点和第二节点之间的电容器,具有耦合在第二节点和第三节点之间的控制节点的开关; 以及DC馈电电路,其具有耦合到第二节点的第一端和被配置为接收第一或第二控制信号的第二端。 开关的控制节点被连接到预定的偏置电压。 当施加第一控制信号时,电容器经由开关耦合在第一节点和第三节点之间,使得电容器与谐振电路的电容器并联耦合,并且当施加第二控制信号时,电容器 与油箱回路分离。

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