Method and test structures for measuring interconnect coupling capacitance in an IC chip
    1.
    发明授权
    Method and test structures for measuring interconnect coupling capacitance in an IC chip 失效
    用于测量IC芯片中互连耦合电容的方法和测试结构

    公开(公告)号:US06870387B2

    公开(公告)日:2005-03-22

    申请号:US10699830

    申请日:2003-11-04

    IPC分类号: G01R31/28 G01R31/26

    CPC分类号: G01R31/2884 G01R31/2853

    摘要: Measurement method and test structures for measuring interconnect coupling capacitance in an IC chip are provided. This method employs CBCM technique. In the first step, two test structures are used to measure a target configuration in order to obtain the total capacitance C of a metal line with respect to ground including line-to-line, fringe and area components (C=2Cc+2Cf+Ca). In the second step, two other test structures are used to measure a dummy configuration in order to obtain the area and fringe capacitance Cdummy of the metal line with respect to ground including fringe and area components (Cdummy=2Cf+Ca). After the two steps, the coupling capacitance Cc between the metal line and another line can be determined according to the formula Cc=(C−Cdummy)/2.

    摘要翻译: 提供了用于测量IC芯片中的互连耦合电容的测量方法和测试结构。 该方法采用CBCM技术。 在第一步中,使用两个测试结构来测量目标结构,以获得金属线相对于包括线对线,边缘和面积分量的金属线的总电容C(C = 2Cc + 2Cf + Ca )。 在第二步中,为了获得金属线相对于包括边缘和面积分量(Cdummy = 2Cf + Ca)的地面的金属线的面积和边缘电容Cdummy,使用另外两个测试结构来测量虚拟配置。 在两步之后,可以根据公式Cc =(C-Cdummy)/ 2来确定金属线与另一条线之间的耦合电容Cc。

    Method and test structures for measuring interconnect coupling capacitance in an IC chip
    2.
    发明申请
    Method and test structures for measuring interconnect coupling capacitance in an IC chip 失效
    用于测量IC芯片中互连耦合电容的方法和测试结构

    公开(公告)号:US20050024077A1

    公开(公告)日:2005-02-03

    申请号:US10699830

    申请日:2003-11-04

    IPC分类号: G01R31/28 G01R31/26

    CPC分类号: G01R31/2884 G01R31/2853

    摘要: Measurement method and test structures for measuring interconnect coupling capacitance in an IC chip are provided. This method employs CBCM technique. In the first step, two test structures are used to measure a target configuration in order to obtain the total capacitance C of a metal line with respect to ground including line-to-line, fringe and area components(C=2Cc+2Cf+Ca). In the second step, two other test structures are used to measure a dummy configuration in order to obtain the area and fringe capacitance Cdummy of the metal line with respect to ground including fringe and area components (Cdummy=2Cf+Ca). After the two steps, the coupling capacitance Cc between the metal line and another line can be determined according to the formula Cc=(C-Cdummy)/2.

    摘要翻译: 提供了用于测量IC芯片中的互连耦合电容的测量方法和测试结构。 该方法采用CBCM技术。 在第一步中,使用两个测试结构来测量目标结构,以获得金属线相对于包括线对线,边缘和面积分量的金属线的总电容C(C = 2Cc + 2Cf + Ca )。 在第二步中,为了获得金属线相对于包括边缘和面积分量(Cdummy = 2Cf + Ca)的地面的面积和边缘电容Cdummy,使用另外两个测试结构来测量虚拟配置。 在两步之后,可以根据公式Cc =(C-Cdummy)/ 2来确定金属线与另一条线之间的耦合电容Cc。

    Compound Semiconductor Device and Method for Fabricating the Same
    3.
    发明申请
    Compound Semiconductor Device and Method for Fabricating the Same 有权
    复合半导体器件及其制造方法

    公开(公告)号:US20110291226A1

    公开(公告)日:2011-12-01

    申请号:US12967289

    申请日:2010-12-14

    IPC分类号: H01L29/66 H01L21/02

    摘要: A compound semiconductor device is provided, including a gallium arsenide (GaAs) substrate having a first protrusion portion and a second protrusion portion, wherein the first protrusion portion is formed over a first portion of the GaAs substrate and the second protrusion is formed over a second portion of the GaAs substrate. A first element is disposed over the first protrusion portion, and a second element is disposed over the second protrusion portion.

    摘要翻译: 提供了一种化合物半导体器件,其包括具有第一突出部分和第二突出部分的砷化镓(GaAs)衬底,其中第一突出部分形成在GaAs衬底的第一部分上,并且第二突起形成在第二突起部分上 部分GaAs衬底。 第一元件设置在第一突出部分上方,第二元件设置在第二突起部分上。

    High-efficiency single to differential amplifier
    4.
    发明授权
    High-efficiency single to differential amplifier 有权
    高效单差分放大器

    公开(公告)号:US07692493B1

    公开(公告)日:2010-04-06

    申请号:US12356537

    申请日:2009-01-21

    IPC分类号: H03F3/04

    摘要: A high-efficiency single-to-differential amplifier has a first transistor acting as a first amplification stage. A second transistor, a third transistor, a first choke, a second choke, and a first capacitor form a second single-to-differential amplification stage. The first amplification stage receives and amplifies an input signal, outputs the amplified signal to the second single-to-differential amplification stage through a coupling module, and concurrently provides DC bias current to the second single-to-differential amplification stage through a tank. The second single-to-differential amplification stage reuses DC current of the first amplification stage, amplifies the output signal of the first amplification stage, and transfers it to a differential output.

    摘要翻译: 高效率的单对差分放大器具有作为第一放大级的第一晶体管。 第二晶体管,第三晶体管,第一扼流圈,第二扼流圈和第一电容器形成第二单差放大级。 第一放大级接收并放大输入信号,通过耦合模块将放大的信号输出到第二单差分放大级,并通过一个容器向第二单差放大级提供DC偏置电流。 第二单差分放大级重新利用第一放大级的直流电流,放大第一放大级的输出信号,并将其传送到差分输出。

    LC resonant circuit
    5.
    发明授权
    LC resonant circuit 有权
    LC谐振电路

    公开(公告)号:US07671704B2

    公开(公告)日:2010-03-02

    申请号:US11819281

    申请日:2007-06-26

    IPC分类号: H03H7/01

    摘要: An LC resonant circuit. The LC resonant circuit comprises an inductor and a conductor. The inductor is an electrode plate of a capacitor. The conductor is over, under, or on both sides of the inductor and used as the other electrode plate of the capacitor.

    摘要翻译: LC谐振电路。 LC谐振电路包括一个电感和一个导体。 电感器是电容器的电极板。 导体在电感器的两侧,下面或两侧,用作电容器的另一个电极板。

    Sensing apparatus
    8.
    发明授权
    Sensing apparatus 有权
    传感装置

    公开(公告)号:US08904868B2

    公开(公告)日:2014-12-09

    申请号:US13458359

    申请日:2012-04-27

    IPC分类号: G01P15/125 G01P15/08

    CPC分类号: G01P15/125 G01P2015/0814

    摘要: A sensing apparatus includes an acceleration sensing unit, for measuring an acceleration applied to a proof mass, further including: a proof mass; a carrier signal source, for providing a carrier signal; a capacitive half-bridge, including a first and a second capacitor, wherein each capacitor is coupled to the proof mass and the carrier signal source, one with a positive electrode and the other one with a negative electrode, and the acceleration applied to the proof mass makes the carrier signal flow through the first and the second capacitor so that the first capacitor and the second capacitor respectively generates a first voltage and a second voltage variation which have opposite phases with each other; and an instrumentation amplifier, for receiving and amplifying the first voltage and the second voltage variation, whereby the magnitude and the direction of the acceleration applied to the proof mass is determined.

    摘要翻译: 感测装置包括加速度检测单元,用于测量施加到检验质量块的加速度,还包括:检验质量块; 载波信号源,用于提供载波信号; 包括第一和第二电容器的电容半桥,其中每个电容器耦合到检测质量块和载波信号源,一个具有正电极,另一个与负电极耦合,并且加速度应用于证明 质量使载体信号流过第一和第二电容器,使得第一电容器和第二电容器分别产生彼此具有相反相位的第一电压和第二电压变化; 以及用于接收和放大第一电压和第二电压变化的仪表放大器,由此确定施加到检验质量块的加速度的大小和方向。

    SENSING APPARATUS
    9.
    发明申请
    SENSING APPARATUS 有权
    感应装置

    公开(公告)号:US20120285245A1

    公开(公告)日:2012-11-15

    申请号:US13458359

    申请日:2012-04-27

    IPC分类号: G01P15/125

    CPC分类号: G01P15/125 G01P2015/0814

    摘要: A sensing apparatus includes an acceleration sensing unit, for measuring an acceleration applied to a proof mass, further including: a proof mass; a carrier signal source, for providing a carrier signal; a capacitive half-bridge, including a first and a second capacitor, wherein each capacitor is coupled to the proof mass and the carrier signal source, one with a positive electrode and the other one with a negative electrode, and the acceleration applied to the proof mass makes the carrier signal flow through the first and the second capacitor so that the first capacitor and the second capacitor respectively generates a first voltage and a second voltage variation which have opposite phases with each other; and an instrumentation amplifier, for receiving and amplifying the first voltage and the second voltage variation, whereby the magnitude and the direction of the acceleration applied to the proof mass is determined.

    摘要翻译: 感测装置包括加速度检测单元,用于测量施加到检验质量块的加速度,还包括:检验质量块; 载波信号源,用于提供载波信号; 包括第一和第二电容器的电容半桥,其中每个电容器耦合到检测质量块和载波信号源,一个具有正电极,另一个与负电极耦合,并且加速度应用于证明 质量使得载流子信号流过第一和第二电容器,使得第一电容器和第二电容器分别产生彼此具有相反相位的第一电压和第二电压变化; 以及用于接收和放大第一电压和第二电压变化的仪表放大器,由此确定施加到检验质量块的加速度的大小和方向。

    Method for extracting substrate coupling coefficient of a flash memory
    10.
    发明授权
    Method for extracting substrate coupling coefficient of a flash memory 有权
    提取闪速存储器的衬底耦合系数的方法

    公开(公告)号:US06292393B1

    公开(公告)日:2001-09-18

    申请号:US09531197

    申请日:2000-03-20

    IPC分类号: G11C700

    CPC分类号: G11C16/20

    摘要: A method is used to fully extract coupling coefficients of a flash memory cell by a GIDL manner. The flash memory cell is composed of a substrate, a drain region, source region, a control gate and a floating gate. The method keeps the source voltage Vs and the substrate voltage Vb fixed. The drain voltage Vd and the control gate voltage are varied. Then, measuring a GIDL current obtains a first coefficient ratio of the drain coupling coefficient ad to the gate coupling &agr;cg, that is, &agr;d/&agr;cg. Similarly, keeping the drain voltage Vd and the substrate voltage Vb fixed and varying the source voltage Vs and the control gate voltage Vcg, a second coefficient ratio of the source coupling coefficient &agr;s to the gate coupling coefficient &agr;cg, that is, &agr;s/&agr;cg. Similarly, keeping the drain voltage Vd and the source voltage Vs fixed and varying the control gate voltage Vcg and the substrate voltage Vb, a third coefficient ratio of the substrate coupling coefficient &agr;b to the gate coupling coefficient &agr;cg, that is, &agr;b/&agr;cg. The first coefficient ratio &agr;d/&agr;cg, the second coefficient ratio &agr;s/&agr;cg, and the third coefficient ratio &agr;b/&agr;cg incorporate a normalization equation of &agr;d+&agr;s+&agr;b+&agr;cg=1, so that all four coefficients &agr;d, &agr;s, &agr;b, and &agr;cg can be exactly solved.

    摘要翻译: 一种方法用于通过GIDL方式完全提取闪存单元的耦合系数。 闪存单元由衬底,漏极区域,源极区域,控制栅极和浮动栅极组成。 该方法保持源极电压Vs和衬底电压Vb固定。 漏极电压Vd和控制栅极电压变化。 然后,测量GIDL电流获得排水耦合系数ad与门耦合alphacg的第一系数比,即alphad / alphacg。 类似地,保持漏极电压Vd和衬底电压Vb固定并改变源极电压Vs和控制栅极电压Vcg,源耦合系数αα的第二系数比与门耦合系数alphacg,即alphas / alphacg。 类似地,保持漏极电压Vd和源极电压Vs固定,并且改变控制栅极电压Vcg和衬底电压Vb,衬底耦合系数alphab与栅极耦合系数alphacg的第三系数比,即alphab / alphacg。 第一系数比alphad / alphacg,第二系数比alphas / alphacg和第三系数比alphab / alphacg包含alphad + alphas + alphab + alphacg = 1的归一化方程,使得所有四个系数alphad,alphas,alphab, 和alphacg可以精确解决。