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    Semiconductor device using a polysilicon layer
    131.
    发明授权
    Semiconductor device using a polysilicon layer 失效
    使用多晶硅层的半导体器件

    公开(公告)号：US06768159B2

    公开(公告)日：2004-07-27

    申请号：US10284333

    申请日：2002-10-31

    Applicant: Eun Jeong Park ,  Sung Chul Lee

    Inventor： Eun Jeong Park ,  Sung Chul Lee

    IPC: H01L29788

    CPC classification number: H01L27/11521 ,  H01L21/743 ,  H01L27/115

    Abstract: A semiconductor device in which polysilicon is used to form source and drain regions in an initial process step so as to reduce resistance of bit lines and minimize a junction capacitance and thus improve its reliability, and a method for fabricating the same are disclosed, the semiconductor device including a semiconductor substrate, trenches formed in predetermined areas of the semiconductor substrate, an insulating layer formed in the trenches and beneath a surface of the substrate to have a recess, a polysilicon layer formed on the insulating layer in the trench, source and drain regions formed at both sides of the polysilicon layer beneath a surface of the semiconductor substrate, and gates formed over the semiconductor substrate.

    Abstract translation: 一种半导体器件，其中在初始工艺步骤中使用多晶硅来形成源极和漏极区域，以便降低位线的电阻并最小化结电容，从而提高其可靠性，并且公开了一种其制造方法 包括半导体衬底的器件，形成在所述半导体衬底的预定区域中的沟槽，形成在所述沟槽中并在所述衬底的表面下方的绝缘层，以具有凹槽，形成在所述沟槽中的绝缘层上的多晶硅层，源极和漏极 形成在半导体衬底的表面下方的多晶硅层的两侧的区域以及形成在半导体衬底上的栅极。

    Device and fabricating method of non-volatile memory
    132.
    发明授权
    Device and fabricating method of non-volatile memory 失效
    非易失性存储器的装置和制造方法

    公开(公告)号：US6037221A

    公开(公告)日：2000-03-14

    申请号：US790859

    申请日：1997-02-03

    Applicant: Sung Chul Lee ,  Min Gyu Lim

    Inventor： Sung Chul Lee ,  Min Gyu Lim

    IPC: H01L27/10 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/72

    CPC classification number: H01L27/11521 ,  H01L27/115

    Abstract: A non-volatile memory device includes a substrate, a projection having two sides formed on the substrate, a floating gate formed on the projection, a control gate formed on the substrate including the floating gate, a first impurity region formed in the substrate extended from one side of the projection, and a second impurity region formed in the substrate at the other side of the projection and in the substrate extended from the other side of the projection.

    Abstract translation: 一种非易失性存储器件，包括：衬底，具有形成在衬底上的两侧的突起;形成在该突起上的浮置栅极;形成在该衬底上的控制栅极，该栅极包括该浮动栅极;形成在该衬底中的第一杂质区， 在突起的另一侧和从该突起的另一侧延伸的基板的基板上形成的第二杂质区域。

    Semiconductor device having a recessed channel structure and method for fabricating the same
    133.
    发明授权
    Semiconductor device having a recessed channel structure and method for fabricating the same 失效
    具有凹陷沟道结构的半导体器件及其制造方法

    公开(公告)号：US5773343A

    公开(公告)日：1998-06-30

    申请号：US512644

    申请日：1995-08-08

    Applicant: Sung Chul Lee ,  Min Gyu Lim

    Inventor： Sung Chul Lee ,  Min Gyu Lim

    IPC: H01L27/112 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

    CPC classification number: H01L27/11517 ,  H01L29/42336 ,  H01L29/7883

    Abstract: A semiconductor device having a recessed channel structure which has a semiconductor region positioned at a level above a channel region, including a first conduction type substrate having a channel region therein, a second conduction type semiconductor region formed on the substrate excluding the channel region, a first insulation film formed on the semiconductor region, a second insulation film formed on a surface between the channel region and the semiconductor region, a first gate formed on a gate insulation film on the channel region, and a dielectric film formed between the first gate and the first insulation film. Also, a method for fabricating a semiconductor device having a recessed structure, including the steps of: forming a second conduction type polysilicon film on a first conduction type substrate; forming a first insulation film on the polysilicon film; forming a semiconductor layer by etching the first insulation film and the underlying polysilicon film; forming a second insulation film on an exposed surface of the substrate between the semiconductor layer and at sides of the semiconductor layer and the first insulation film; forming a first gate on the second insulation film; forming a dielectric film on a surface between the first gate and the second insulation film; and forming a second gate on the dielectric film.

    Abstract translation: 一种具有凹陷沟道结构的半导体器件，其具有位于沟道区域上方的半导体区域，包括其中具有沟道区的第一导电型衬底，形成在除了沟道区域之外的衬底上的第二导电型半导体区域， 形成在半导体区域上的第一绝缘膜，形成在沟道区域和半导体区域之间的表面上的第二绝缘膜，形成在沟道区域上的栅极绝缘膜上的第一栅极，以及形成在第一栅极和 第一绝缘膜。 另外，制造具有凹陷结构的半导体器件的方法包括以下步骤：在第一导电型衬底上形成第二导电型多晶硅膜; 在所述多晶硅膜上形成第一绝缘膜; 通过蚀刻第一绝缘膜和下面的多晶硅膜形成半导体层; 在所述半导体层和所述半导体层和所述第一绝缘膜之间的所述衬底的暴露表面上形成第二绝缘膜; 在所述第二绝缘膜上形成第一栅极; 在所述第一栅极和所述第二绝缘膜之间的表面上形成电介质膜; 以及在所述电介质膜上形成第二栅极。

    Magnetic Memory Devices
    135.
    发明申请
    Magnetic Memory Devices 有权
    磁存储器件

    公开(公告)号：US20160093669A1

    公开(公告)日：2016-03-31

    申请号：US14715633

    申请日：2015-05-19

    Applicant: Sung-Chul LEE ,  Kwang-Seok KIM ,  Kee-Won KIM ,  Young-Man JANG ,  Ung-Hwan PI

    Inventor： Sung-Chul LEE ,  Kwang-Seok KIM ,  Kee-Won KIM ,  Young-Man JANG ,  Ung-Hwan PI

    IPC: H01L27/22 ,  H01L43/10

    CPC classification number: H01L27/222 ,  G11C11/161 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

    Abstract: Magnetic memory devices may include a substrate, a circuit device on the substrate, a plurality of lower electrodes electrically connected to the circuit device, a magnetic tunnel junction (MTJ) structure commonly provided on the plurality of the lower electrodes, and a plurality of upper electrodes on the MTJ structure. The MTJ structure may include a plurality of magnetic material patterns and a plurality of insulation material patterns separating the magnetic material patterns from each other.

    Abstract translation: 磁存储器件可以包括衬底，衬底上的电路器件，电连接到电路器件的多个下电极，通常设置在多个下电极上的磁隧道结（MTJ）结构，以及多个上电极 MTJ结构上的电极。 MTJ结构可以包括多个磁性材料图案和将磁性材料图案彼此分开的多个绝缘材料图案。

    Semiconductor apparatus capable of error revision using pin extension technique and design method therefor
    137.
    发明授权
    Semiconductor apparatus capable of error revision using pin extension technique and design method therefor 有权
    能够使用引脚扩展技术进行错误修正的半导体装置及其设计方法

    公开(公告)号：US08689163B2

    公开(公告)日：2014-04-01

    申请号：US12928021

    申请日：2010-12-01

    Applicant: Dong-Yun Kim ,  Dong-Hoon Yeo ,  Hyun-Chul Shin ,  Kyung-Ho Kim ,  Byung-Tae Kang ,  Ju-Yong Shin ,  Sung-Chul Lee

    Inventor： Dong-Yun Kim ,  Dong-Hoon Yeo ,  Hyun-Chul Shin ,  Kyung-Ho Kim ,  Byung-Tae Kang ,  Ju-Yong Shin ,  Sung-Chul Lee

    IPC: G06F17/50

    CPC classification number: H01L23/525 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor apparatus and a design method for the semiconductor apparatus allow debugging or repairs by using a spare cell. The semiconductor apparatus includes a plurality of metal layers. At least one repair block performs a predetermined function. A spare block is capable of substituting for a function of the repair block. And at least one of the plurality of metal layers is predetermined to be a repair layer for error revision. At least one pin of the repair block is connected to the repair layer through a first pin extension, and at least one pin of the spare block is capable of extending to the repair layer. When the repair block is to be repaired, the pin extension of the repair layer and the repair block is disconnected, and at least one pin of the spare block is connected to the repair layer through a second pin extension.

    Abstract translation: 半导体装置的半导体装置和设计方法允许使用备用单元进行调试或维修。 半导体装置包括多个金属层。 至少一个修理块执行预定的功能。 备用块能够代替维修块的功能。 并且多个金属层中的至少一个被预先确定为用于错误修正的修复层。 修复块的至少一个销通过第一销延伸连接到修复层，并且备用块的至少一个引脚能够延伸到修复层。 当修理修理块时，修理层和维修块的销延伸被断开，备用块的至少一个引脚通过第二个引脚延伸连接到修复层。

    Catalytic combustor and fuel reformer having the same
    139.
    发明授权
    Catalytic combustor and fuel reformer having the same 失效
    催化燃烧器和燃料重整器具有相同的功能

    公开(公告)号：US08617269B2

    公开(公告)日：2013-12-31

    申请号：US12616115

    申请日：2009-11-10

    Applicant: In-Hyuk Son ,  Woo-Cheol Shin ,  Jin-Goo Ahn ,  Jong-Rock Choi ,  Sung-Chul Lee

    Inventor： In-Hyuk Son ,  Woo-Cheol Shin ,  Jin-Goo Ahn ,  Jong-Rock Choi ,  Sung-Chul Lee

    IPC: B01J8/00

    CPC classification number: B01J19/2485 ,  B01J19/2495 ,  B01J2219/00117 ,  C01B3/34 ,  C01B2203/0233 ,  C01B2203/066 ,  C01B2203/0811 ,  C01B2203/0822 ,  C01B2203/0827 ,  F23C6/047 ,  F23C13/04 ,  F23C2900/03002 ,  Y02P20/128

    Abstract: A catalytic combustor and a fuel reformer having the same. The catalytic combustor includes a housing having a cylindrical reaction portion and a second reaction portion surrounding the first reaction portion in a double tube shape. The housing has a first opening for supplying a first fuel and an oxidant to the first reaction portion and a second opening through which an exhaust in the second reaction portion is discharged. The first and second openings are disposed at first sides of the first and second reaction portions, respectively. The first and second reaction portions are connected with each other so that the fluid is communicated with the first and second reaction portions at second sides of the first and second reaction portions. A catalyst is disposed in the first reaction portion, and a mesh layer is inserted into the second reaction portion.

    Abstract translation: 催化燃烧器和具有该催化燃烧器的燃料重整器。 催化燃烧器包括具有圆柱形反应部分的壳体和围绕第二反应部分的双管形状的第二反应部分。 壳体具有用于向第一反应部分供应第一燃料和氧化剂的第一开口和排出第二反应部分中的排气的第二开口。 第一和第二开口分别设置在第一和第二反应部分的第一侧。 第一和第二反应部分彼此连接，使得流体在第一和第二反应部分的第二侧与第一和第二反应部分连通。 催化剂设置在第一反应部分中，并且将网层插入到第二反应部分中。

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