公开(公告)号：US20170186355A1

公开(公告)日：2017-06-29

申请号：US15387190

申请日：2016-12-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Hiroyuki MIYAKE

IPC: G09G3/20 ,  G09G3/3258 ,  G09G3/36 ,  H03M1/66 ,  H01L27/12

CPC classification number: G09G3/2011 ,  G02F1/13454 ,  G02F1/136286 ,  G09G3/3258 ,  G09G3/3648 ,  G09G3/3688 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2310/027 ,  G09G2320/0276 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H03M1/66 ,  H03M1/76

Abstract: A semiconductor device with lower power consumption or a display device including the semiconductor device is provided. A circuit to which an N-bit signal is input includes a first digital-to-analog converter circuit to which an upper M-bit signal is input, a second digital-to-analog converter circuit to which a lower (N−M)-bit signal is input, and an amplifier circuit. The amplifier circuit includes a first transistor and a second transistor. An output terminal of the first digital-to-analog converter circuit is electrically connected to a gate of the first transistor. An output terminal of the second digital-to-analog converter circuit is electrically connected to a substrate potential of the second transistor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor. An output terminal of the amplifier circuit is electrically connected to a gate of the second transistor.

公开(公告)号：US20170179160A1

公开(公告)日：2017-06-22

申请号：US15375466

申请日：2016-12-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: H01L27/12 ,  G09G3/20

CPC classification number: H01L27/124 ,  G09G3/2092 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2300/0814 ,  G09G2300/0819 ,  G09G2300/0838 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2330/021 ,  G09G2330/028 ,  H01L27/1225 ,  H01L27/1251

Abstract: A semiconductor device with reduced power consumption and a display device including the semiconductor are provided. The semiconductor device generates a bias voltage that is to be supplied to a buffer amplifier. When the display device displays a still image, a data signal for updating the image need not be supplied from the buffer amplifier to a pixel array in the next frame; therefore, the circuit is configured so that the buffer amplifier is brought into a standby state (temporarily stopped). Specifically, input of a reference current from a BGR circuit to the semiconductor is stopped and a bias voltage is applied from the semiconductor device to the buffer amplifier to temporarily stop the operation of the buffer amplifier.

公开(公告)号：US20170092776A1

公开(公告)日：2017-03-30

申请号：US15372493

申请日：2016-12-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  H01L29/24 ,  G06K19/077 ,  H01L29/66 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/088

CPC classification number: H01L29/26 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel fog nation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20160254500A1

公开(公告)日：2016-09-01

申请号：US15049644

申请日：2016-02-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuya KAWATA ,  Kei TAKAHASHI

IPC: H01M2/02 ,  H01G11/78 ,  F21V23/02 ,  H02J50/12 ,  H02J7/02

Abstract: To provide a flexible, highly reliable power storage device or light-emitting device. The device includes a battery unit or a light-emitting unit and a member with rubber elasticity. The battery unit includes a secondary battery. The light-emitting unit includes a light-emitting element. The member with rubber elasticity is provided with a first projection and a second projection. The first projection and the second projection are arranged on a first surface of the battery unit or the light-emitting unit. The first projection and the second projection come in contact with each other when the power storage device is bent such that the first surface of the battery unit faces inward.

Abstract translation: 提供灵活，高度可靠的蓄电装置或发光装置。 该装置包括电池单元或发光单元和具有橡胶弹性的构件。 电池单元包括二次电池。 发光单元包括发光元件。 具有橡胶弹性的构件设置有第一突起和第二突起。 第一突起和第二突起布置在电池单元或发光单元的第一表面上。 当蓄电装置弯曲使得电池单元的第一表面向内时，第一突起和第二突起彼此接触。

公开(公告)号：US20160225463A1

公开(公告)日：2016-08-04

申请号：US15091762

申请日：2016-04-06

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Hideto OHNUMA ,  Kei TAKAHASHI

IPC: G11C19/28 ,  G09G3/20 ,  H01L27/12

CPC classification number: G11C19/28 ,  G09G3/20 ,  G09G5/00 ,  G09G2310/0248 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2330/021 ,  G09G2380/02 ,  H01L21/77 ,  H01L27/1203 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1266

Abstract: Disclosed is a driver circuit including a latch circuit, a shift register circuit, and a switching circuit, where the latch circuit is provided over the shift register circuit and the switching circuit. The shift register circuit and the switching circuit may have a silicon-based semiconductor, while the latch circuit may have an oxide semiconductor. The latch circuit includes a first transistor and a second transistor connected in series. The latch circuit may further include a first capacitor and a second capacitor which are electrically connected to the first transistor and the second transistor. A display device using the driver circuit as well as a method for preparing the driver circuit is also disclosed.

公开(公告)号：US20160195584A1

公开(公告)日：2016-07-07

申请号：US15067382

申请日：2016-03-11

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Jun KOYAMA

IPC: G01R31/36

CPC classification number: G01R31/3833 ,  G01R1/203 ,  G01R19/25 ,  G01R31/364 ,  G01R31/3832

Abstract: A coulomb counter is provided. In the coulomb counter, a current generated on charge or discharge of a secondary battery is converted into a voltage by a resistor, and the voltage is amplified by an amplifier circuit. The voltage amplified by the amplifier circuit is converted into a current by a voltage-current converter circuit, and the current is input to a cumulative addition circuit. The cumulative addition circuit charges a capacitor with the current input from the voltage-current converter circuit and generates a signal corresponding to a voltage generated across the capacitor. One terminal of the capacitor is connected to an output of the voltage-current converter circuit through a switch, and the other terminal of the capacitor is supplied with a constant potential. By on/off of the switch, supply of electric charge to the capacitor and storage of the electric charge can be controlled.

Abstract translation: 提供库仑计数器。 在库仑计数器中，二次电池充电或放电时产生的电流由电阻器转换成电压，并通过放大电路放大电压。 由放大器电路放大的电压由电压 - 电流转换器电路转换为电流，并且电流被输入到累积加法电路。 累积加法电路使电容器与来自电压 - 电流转换器电路的电流输入充电，并产生对应于电容器两端产生的电压的信号。 电容器的一个端子通过开关连接到电压 - 电流转换器电路的输出，并且电容器的另一个端子被提供恒定电位。 通过开/关开关，可以控制电容器的电荷供应和电荷的储存。

公开(公告)号：US20160142047A1

公开(公告)日：2016-05-19

申请号：US15001338

申请日：2016-01-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Kei TAKAHASHI ,  Tatsuya ONUKI

IPC: H03K5/24

CPC classification number: H03K5/2481 ,  G11C27/024 ,  G11C27/026 ,  H03K5/249

Abstract: A sample-and-hold circuit including a transistor and a capacitor is connected to the differential circuit. The sample-and-hold circuit acquires voltage for correcting the offset voltage of the differential circuit by charging or discharging the capacitor through sampling operation. Then, it holds the potential of the capacitor through holding operation. In normal operation of the differential circuit, the output potential of the differential circuit is corrected by the potential held by the capacitor. The transistor in the sample-and-hold circuit is preferably a transistor whose channel is formed using an oxide semiconductor. An oxide semiconductor transistor has extremely low leakage current; thus, a change in the potential held in the capacitor of the sample-and-hold circuit can be minimized.

Abstract translation: 包括晶体管和电容器的采样保持电路连接到差分电路。 采样保持电路通过采样操作对电容器进行充电或放电来获取用于校正差分电路的偏移电压的电压。 然后，它通过保持操作保持电容器的电位。 在差分电路的正常工作中，差分电路的输出电位由电容器保持的电位进行校正。 采样保持电路中的晶体管优选地是使用氧化物半导体形成沟道的晶体管。 氧化物半导体晶体管具有极低的漏电流; 因此，可以使采样保持电路的电容器中保持的电位变化最小化。

公开(公告)号：US20160093641A1

公开(公告)日：2016-03-31

申请号：US14862171

申请日：2015-09-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  G09G3/3233 ,  G09G2320/0295 ,  G09G2320/043

Abstract: A semiconductor device capable of detecting a minute current with high accuracy is provided. The semiconductor device includes a first circuit, a second circuit, a first transistor, and a second transistor. A first analog signal is input to the first circuit via the first transistor. A second analog signal is input to the first circuit via the second transistor. The first analog signal includes a value of a first current. The second analog signal includes a value of a second current. The first circuit is capable of converting the first analog signal into a first digital signal. The second circuit is capable of generating a second digital signal based on the first digital signal. The first circuit is capable of converting the second analog signal into a third digital signal based on the second digital signal. The first or second transistor includes an oxide semiconductor in a channel.

Abstract translation: 提供能够高精度地检测微小电流的半导体装置。 半导体器件包括第一电路，第二电路，第一晶体管和第二晶体管。 第一模拟信号经由第一晶体管输入到第一电路。 第二模拟信号通过第二晶体管输入到第一电路。 第一模拟信号包括第一电流的值。 第二模拟信号包括第二电流的值。 第一电路能够将第一模拟信号转换成第一数字信号。 第二电路能够基于第一数字信号产生第二数字信号。 第一电路能够基于第二数字信号将第二模拟信号转换成第三数字信号。 第一或第二晶体管包括沟道中的氧化物半导体。

公开(公告)号：US20150279929A1

公开(公告)日：2015-10-01

申请号：US14677180

申请日：2015-04-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kei TAKAHASHI ,  Yoshiaki ITO

IPC: H01L29/06 ,  H01L29/04 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/1251 ,  H01L29/045 ,  H01L29/0611 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66477 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78642 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

Abstract: It is an object to provide a semiconductor device having a new productive semiconductor material and a new structure. The semiconductor device includes a first conductive layer over a substrate, a first insulating layer which covers the first conductive layer, an oxide semiconductor layer over the first insulating layer that overlaps with part of the first conductive layer and has a crystal region in a surface part, second and third conductive layers formed in contact with the oxide semiconductor layer, an insulating layer which covers the oxide semiconductor layer and the second and third conductive layers, and a fourth conductive layer over the insulating layer that overlaps with part of the oxide semiconductor layer.

Abstract translation: 本发明的目的是提供一种具有新的生产半导体材料和新结构的半导体器件。 半导体器件包括：衬底上的第一导电层，覆盖第一导电层的第一绝缘层，与第一导电层的一部分重叠的第一绝缘层上的氧化物半导体层，并且在表面部分中具有晶体区域 形成为与氧化物半导体层接触的第二和第三导电层，覆盖氧化物半导体层和第二和第三导电层的绝缘层，以及绝缘层上的与氧化物半导体层的一部分重叠的第四导电层 。

公开(公告)号：US20150108959A1

公开(公告)日：2015-04-23

申请号：US14580279

申请日：2014-12-23

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Yoshiaki ITO ,  Hiroki INOUE ,  Tatsuji NISHIJIMA

IPC: H02M3/156

CPC classification number: H02M3/156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869 ,  H02M3/155

Abstract: A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×1019 atoms/cm3 as a channel formation layer.

Abstract translation: 提供了具有高可靠性的DC转换器电路。 DC转换器电路包括：电感器，被配置为根据流动电流的变化产生电动势; 包括栅极，源极和漏极的晶体管，其被配置为通过导通或关断来控制电感器中的电动势的产生; 当晶体管截止时处于导通状态的整流器; 以及被配置为控制晶体管的导通和截止的控制电路。 晶体管包括作为沟道形成层的氢浓度小于或等于5×1019原子/ cm3的氧化物半导体层。