中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

9 records (took 0.019 seconds)

    PROGRAMMABLE LOGIC DEVICE
    1.
    发明申请
    PROGRAMMABLE LOGIC DEVICE 审中-公开

    公开(公告)号：US20170179955A1

    公开(公告)日：2017-06-22

    申请号：US15454225

    申请日：2017-03-09

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Seiichi YONEDA ,  Tatsuji NISHIJIMA

    IPC: H03K19/00 ,  H01L27/12 ,  H01L29/786 ,  H03K19/177

    CPC classification number: H03K19/0013 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K19/0008 ,  H03K19/17736 ,  H03K19/17744

    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.

    SEMICONDUCTOR DISPLAY DEVICE
    2.
    发明申请
    SEMICONDUCTOR DISPLAY DEVICE 有权
    半导体显示设备

    公开(公告)号：US20170039970A1

    公开(公告)日：2017-02-09

    申请号：US15299515

    申请日：2016-10-21

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tatsuji NISHIJIMA ,  Seiichi YONEDA ,  Takuro OHMARU ,  Jun KOYAMA

    IPC: G09G3/36 ,  H01L29/24 ,  G09G5/395 ,  H01L27/105 ,  G09G5/393 ,  H01L29/786 ,  H01L27/12

    CPC classification number: G09G3/3648 ,  G02F2001/136295 ,  G09G3/3614 ,  G09G3/3677 ,  G09G5/393 ,  G09G5/395 ,  G09G2300/0842 ,  G09G2310/0264 ,  G09G2330/021 ,  G09G2330/022 ,  G09G2360/121 ,  H01L27/1052 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869 ,  H01L33/16

    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.

    Abstract translation: 在静止图像显示在具有像素的像素部分的情况下，例如通过停止对驱动电路的电源电压的供给来停止将具有图像数据的图像信号写入到像素部分的驱动电路， 并且停止向像素部分写入图像信号。 在驱动器电路停止之后，停止向用于控制驱动器电路的操作的面板控制器的电源电压供给和用于存储图像数据的图像存储器，并且向CPU提供电源电压以集中地控制 停止面板控制器，图像存储器和用于控制对半导体显示装置中的各种电路的电源电压供给的电源控制器。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20140217403A1

    公开(公告)日：2014-08-07

    申请号：US14249569

    申请日：2014-04-10

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tatsuji NISHIJIMA

    IPC: H01L29/786

    CPC classification number: H01L29/7869 ,  H03K19/0944 ,  H03K19/20

    Abstract: A semiconductor device in which a transistor using an oxide semiconductor containing In, Zn, or the like for a channel region can be driven like a p-channel transistor is provided. The semiconductor device includes a transistor and an inverter, wherein an output of the inverter is input to a gate of the transistor, a channel region of the transistor includes an oxide semiconductor film containing In, Zn, or Sn, and each channel region of transistors in the inverter contains silicon. When a high voltage is input to the inverter, a low voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned off. When a low is input to the inverter, a high voltage is output from the inverter and is input to the gate of the transistor, so that the transistor is turned on.

    Abstract translation: 提供一种半导体器件，其中可以像p沟道晶体管一样驱动使用含有沟道区的In，Zn等的氧化物半导体的晶体管。 半导体器件包括晶体管和反相器，其中反相器的输出被输入到晶体管的栅极，晶体管的沟道区包括含有In，Zn或Sn的氧化物半导体膜，以及晶体管的每个沟道区 在变频器内含硅。 当高电压输入到逆变器时，从反相器输出低电压并输入到晶体管的栅极，使得晶体管截止。 当反相器输入低电平时，从反相器输出高电压并输入到晶体管的栅极，使晶体管导通。

    MICROCONTROLLER AND METHOD FOR MANUFACTURING THE SAME
    6.
    发明申请
    MICROCONTROLLER AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    微控制器及其制造方法

    公开(公告)号：US20170038826A1

    公开(公告)日：2017-02-09

    申请号：US15299579

    申请日：2016-10-21

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tatsuji NISHIJIMA ,  Hidetomo KOBAYASHI ,  Tomoaki ATSUMI ,  Kiyoshi KATO ,  Shunpei YAMAZAKI

    IPC: G06F1/32

    CPC classification number: G06F1/3296 ,  G06F1/3206 ,  G06F1/3243 ,  G06F1/3275 ,  G06F1/3287 ,  Y02D10/152 ,  Y02D10/171

    Abstract: A microcontroller which operates in a low power consumption mode is provided. A microcontroller includes a CPU, a memory, and a peripheral circuit such as a timer circuit. A register in the peripheral circuit is provided in an interface with a bus line. A power gate for controlling supply control is provided. The microcontroller can operate not only in a normal operation mode where all circuits are active, but also in a low power consumption mode where some of the circuits are active. A volatile memory and nonvolatile memory are provided in a register, such as a register of the CPU. Data in the volatile memory is backed up in the nonvolatile memory before the power supply is stopped. In the case where the operation mode returns to the normal mode, when power supply is started again, data in the nonvolatile memory is written back into the volatile memory.

    Abstract translation: 提供以低功耗模式工作的微控制器。 微控制器包括CPU，存储器和诸如定时器电路的外围电路。 外围电路中的寄存器设置在与总线线路的接口中。 提供用于控制电源控制的电源门。 微控制器不仅可以在所有电路都有效的正常工作模式下工作，而且还可以在一些电路处于活动状态的低功耗模式下工作。 在诸如CPU的寄存器的寄存器中提供易失性存储器和非易失性存储器。 在电源停止之前，易失性存储器中的数据被备份在非易失性存储器中。 在操作模式返回到正常模式的情况下，当再次开始供电时，非易失性存储器中的数据被写回到易失性存储器中。

    PROGRAMMABLE LOGIC DEVICE
    7.
    发明申请
    PROGRAMMABLE LOGIC DEVICE 审中-公开
    可编程逻辑器件

    公开(公告)号：US20140015566A1

    公开(公告)日：2014-01-16

    申请号：US14031107

    申请日：2013-09-19

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Seiichi YONEDA ,  Tatsuji NISHIJIMA

    IPC: H03K19/00

    CPC classification number: H03K19/0013 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H03K19/0008 ,  H03K19/17736 ,  H03K19/17744

    Abstract: An object is to provide a programmable logic device having logic blocks connected to each other by a programmable switch, where the programmable switch is characterized by an oxide semiconductor transistor incorporated therein. The extremely low off-state current of the oxide semiconductor transistor provides a function as a non-volatile memory due to its high ability to hold a potential of a gate electrode of a transistor which is connected to the oxide semiconductor transistor. The ability of the oxide semiconductor transistor to function as a non-volatile memory allows the configuration data for controlling the connection of the logic blocks to be maintained even in the absence of a power supply potential. Hence, the rewriting process of the configuration data at starting of the device can be omitted, which contributes to the reduction in power consumption of the device.

    Abstract translation: 目的是提供一种具有通过可编程开关彼此连接的逻辑块的可编程逻辑器件，其中可编程开关的特征在于结合在其中的氧化物半导体晶体管。 氧化物半导体晶体管的非常低的截止电流由于其保持与氧化物半导体晶体管连接的晶体管的栅极的电位的高能力而提供作为非易失性存储器的功能。 氧化物半导体晶体管用作非易失性存储器的能力允许用于控制逻辑块的连接的配置数据即使在没有电源电位的情况下也被维持。 因此，可以省略在设备启动时的配置数据的重写处理，这有助于降低设备的功耗。

    DC CONVERTER CIRCUIT AND POWER SUPPLY CIRCUIT
    8.
    发明申请
    DC CONVERTER CIRCUIT AND POWER SUPPLY CIRCUIT 有权
    直流转换电路和电源电路

    公开(公告)号：US20150108959A1

    公开(公告)日：2015-04-23

    申请号：US14580279

    申请日：2014-12-23

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Kei TAKAHASHI ,  Yoshiaki ITO ,  Hiroki INOUE ,  Tatsuji NISHIJIMA

    IPC: H02M3/156

    CPC classification number: H02M3/156 ,  H01L27/12 ,  H01L27/1225 ,  H01L29/7869 ,  H02M3/155

    Abstract: A DC converter circuit having high reliability is provided. The DC converter circuit includes: an inductor configured to generate electromotive force in accordance with a change in flowing current; a transistor including a gate, a source, and a drain, which is configured to control generation of the electromotive force in the inductor by being on or off; a rectifier in a conducting state when the transistor is off; and a control circuit configured to control on and off of the transistor. The transistor includes an oxide semiconductor layer whose hydrogen concentration is less than or equal to 5×1019 atoms/cm3 as a channel formation layer.

    Abstract translation: 提供了具有高可靠性的DC转换器电路。 DC转换器电路包括：电感器，被配置为根据流动电流的变化产生电动势; 包括栅极，源极和漏极的晶体管，其被配置为通过导通或关断来控制电感器中的电动势的产生; 当晶体管截止时处于导通状态的整流器; 以及被配置为控制晶体管的导通和截止的控制电路。 晶体管包括作为沟道形成层的氢浓度小于或等于5×1019原子/ cm3的氧化物半导体层。

    PROGRAMMABLE LOGIC DEVICE
    9.
    发明申请
    PROGRAMMABLE LOGIC DEVICE 审中-公开
    可编程逻辑器件

    公开(公告)号：US20130256762A1

    公开(公告)日：2013-10-03

    申请号：US13903165

    申请日：2013-05-28

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tatsuji NISHIJIMA

    IPC: H01L27/118

    CPC classification number: H01L27/11803 ,  H03K19/17728 ,  H03K19/1776 ,  H03K19/17772

    Abstract: An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal.

    Abstract translation: 本发明的目的是提供一种可编程逻辑器件，其在供电停止，高度集成并且以低功率运行后具有短的启动时间。 在包括输入/​​输出块，包括逻辑元件的多个逻辑块和连接多个逻辑块的布线的可编程逻辑器件中，逻辑元件具有用于保存配置数据和查找表的配置存储器 包括选择电路。 配置存储器包括多个存储元件，每个存储元件包括沟道区域在氧化物半导体膜中的晶体管和设置在晶体管和选择电路之间的运算电路。 配置数据根据输入信号由选择电路选择性地改变和输出。

Patent Agency Ranking