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公开(公告)号:US09341722B2
公开(公告)日:2016-05-17
申请号:US14187909
申请日:2014-02-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto , Hironobu Takahashi , Hiroshi Kanemura , Akiharu Miyanaga
CPC classification number: G01T1/2018
Abstract: An imaging device which is highly stable to irradiation with radiations such as X-rays and can inhibit a decrease in electrical characteristics is provided. The imaging device obtains an image using radiations such as X-rays and includes pixel circuits which are arranged in a matrix and which a scintillator overlaps. Each of the pixel circuits includes a switching transistor whose off-state current is extremely low and a light-receiving element. A shielding layer formed using a metal material and the like overlaps the transistor and the light-receiving element. With the structure, an imaging device which is highly stable to irradiation with radiations such as X-rays and can inhibit a decrease in electrical characteristics can be provided.
Abstract translation: 提供了一种对诸如X射线的辐射照射高度稳定并且可以抑制电特性降低的成像装置。 成像装置使用诸如X射线的辐射获得图像,并且包括排列成矩阵并且闪烁体重叠的像素电路。 每个像素电路包括截止电流极低的开关晶体管和光接收元件。 使用金属材料等形成的屏蔽层与晶体管和光接收元件重叠。 通过该结构,可以提供对X射线等照射进行照射高度稳定并能够抑制电特性降低的成像装置。
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公开(公告)号:US09331208B2
公开(公告)日:2016-05-03
申请号:US14635199
申请日:2015-03-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Masashi Tsubuku , Kengo Akimoto , Hiroki Ohara , Tatsuya Honda , Takatsugu Omata , Yusuke Nonaka , Masahiro Takahashi , Akiharu Miyanaga
IPC: H01L29/88 , H01L29/786 , H01L29/04 , H01L29/10
CPC classification number: H01L29/78696 , H01L29/045 , H01L29/1033 , H01L29/247 , H01L29/7869 , H01L29/78693
Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm−1 and less than or equal to 0.7 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm−1 and less than or equal to 4.1 nm−1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm−1 and less than or equal to 1.4 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm−1 and less than or equal to 7.1 nm−1.
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133.
公开(公告)号:US09331156B2
公开(公告)日:2016-05-03
申请号:US13710867
申请日:2012-12-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto , Yusuke Nonaka , Hiroshi Kanemura
CPC classification number: H01L29/247 , H01L21/02422 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/24 , H01L29/78606 , H01L29/7869 , H01L29/78696
Abstract: To manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor. An oxide semiconductor film is deposited by a sputtering method with the use of a polycrystalline sputtering target. In that case, partial pressure of water in a deposition chamber before or in the deposition is set to be lower than or equal to 10−3 Pa, preferably lower than or equal to 10−4 Pa, more preferably lower than or equal to 10−5 Pa. Thus, a dense oxide semiconductor film is obtained. The density of the oxide semiconductor film is higher than 6.0 g/cm3 and lower than 6.375 g/cm3.
Abstract translation: 通过给晶体管提供稳定的电特性来制造高度可靠的半导体器件。 通过使用多晶溅射靶的溅射法沉积氧化物半导体膜。 在这种情况下,淀积室内或沉积中的水的分压设定为低于或等于10 -3 Pa,优选低于或等于10 -4 Pa,更优选低于或等于10 -5Pa。因此,获得了致密的氧化物半导体膜。 氧化物半导体膜的密度高于6.0g / cm 3,低于6.375g / cm 3。
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公开(公告)号:US09318617B2
公开(公告)日:2016-04-19
申请号:US14574964
申请日:2014-12-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
IPC: H01L21/00 , H01L29/786 , H01L27/12 , H01L29/04 , H01L29/12 , H01L21/263 , H01L29/66 , H01L29/417
CPC classification number: H01L29/78696 , H01L21/2636 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/12 , H01L29/24 , H01L29/41733 , H01L29/66969 , H01L29/7869
Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
Abstract translation: 本发明的目的是提供具有良好电气特性的高度可靠的半导体器件以及包括半导体器件作为开关元件的显示器件。 在包括氧化物半导体层的晶体管中,设置在氧化物半导体层的至少一个表面侧上的针状晶体在垂直于该表面的c轴方向上生长,并且包括平行于该表面的ab平面,以及除了 针状晶体组是无定形区域或非晶态和微晶体混合的区域。 因此,可以形成具有良好电特性的高可靠性半导体器件。
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公开(公告)号:US09214563B2
公开(公告)日:2015-12-15
申请号:US13947334
申请日:2013-07-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Masayuki Sakakura , Ryosuke Watanabe , Junichiro Sakata , Kengo Akimoto , Akiharu Miyanaga , Takuya Hirohashi , Hideyuki Kishida
IPC: H01L29/12 , H01L29/786 , H01L27/12 , H01L29/04 , H01L29/417
CPC classification number: H01L29/78696 , H01L21/2636 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/12 , H01L29/24 , H01L29/41733 , H01L29/66969 , H01L29/7869
Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
Abstract translation: 本发明的目的是提供具有良好电气特性的高度可靠的半导体器件以及包括半导体器件作为开关元件的显示器件。 在包括氧化物半导体层的晶体管中,设置在氧化物半导体层的至少一个表面侧上的针状晶体在垂直于该表面的c轴方向上生长,并且包括平行于该表面的ab平面,以及除了 针状晶体组是无定形区域或非晶态和微晶体混合的区域。 因此,可以形成具有良好电特性的高可靠性半导体器件。
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公开(公告)号:US09142683B2
公开(公告)日:2015-09-22
申请号:US14540167
申请日:2014-11-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto
IPC: H01L29/12 , H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/45
CPC classification number: H01L29/7869 , H01L27/1225 , H01L29/45 , H01L29/66742
Abstract: A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.
Abstract translation: 半导体器件包括氧化物半导体层,其包括沟道形成区域,该沟道形成区域包括具有宽带隙的氧化物半导体和尽可能低的载流子浓度,以及源极和漏极,其包括含有氢的氧化物导体和 氧空位和防止氧和氧在氧化物导电层和氧化物半导体层之间的扩散的阻挡层。 氧化物导电层和氧化物半导体层通过阻挡层彼此电连接。
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137.
公开(公告)号:US09105659B2
公开(公告)日:2015-08-11
申请号:US14334016
申请日:2014-07-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hidekazu Miyairi , Akiharu Miyanaga , Kengo Akimoto , Kojiro Shiraishi
IPC: H01L29/15 , H01L29/22 , H01L29/66 , H01L29/786
CPC classification number: H01L29/66772 , H01L29/6675 , H01L29/78618 , H01L29/7869
Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
Abstract translation: 一个实施例是包括交错(顶栅结构)薄膜晶体管,其中使用含有In,Ga和Zn的氧化物半导体膜作为半导体层,并且缓冲层设置在半导体层与源极和漏极之间 层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层,从而形成欧姆接触。
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公开(公告)号:US09048144B2
公开(公告)日:2015-06-02
申请号:US13651750
申请日:2012-10-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto , Atsushi Umezaki
IPC: H01L29/786 , H01L27/12
CPC classification number: H01L27/1225 , G02F1/13624 , H01L27/124 , H01L27/3276 , H01L29/7869
Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.
Abstract translation: 随着显示装置的定义的增加,像素的数量增加,因此栅极线和信号线的数量增加。 由于栅极线和信号线的数量增加,难以安装具有用于通过接合等驱动栅极和信号线的驱动电路的IC芯片,这导致制造成本的增加。 用于驱动像素部分的像素部分和驱动电路形成在一个衬底上。 使用其中使用氧化物半导体的反交错薄膜晶体管形成驱动电路的至少一部分。 驱动电路以及像素部分设置在相同的基板上,由此降低了制造成本。
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公开(公告)号:US08937306B2
公开(公告)日:2015-01-20
申请号:US13862528
申请日:2013-04-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto , Masashi Tsubuku , Toshinari Sasaki , Hideaki Kuwabara
IPC: H01L33/00 , H01L29/786 , H01L27/12
CPC classification number: H01L33/0041 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L29/78606 , H01L29/7869 , H01L29/78696 , H01L2924/0002 , H01L2924/00
Abstract: In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.
Abstract translation: 在使用第一氧化物半导体层和第二氧化物半导体层的堆叠的底栅极薄膜晶体管中,形成作为沟道保护层的氧化物绝缘层,与氧化物半导体层的与 栅电极层。 在与绝缘层的形成相同的步骤中,形成覆盖氧化物半导体层的叠层的周边部分(包括侧面)的氧化物绝缘层。
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公开(公告)号:US08907335B2
公开(公告)日:2014-12-09
申请号:US13727085
申请日:2012-12-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Kengo Akimoto , Atsushi Umezaki
CPC classification number: H01L27/124 , G09G3/3233 , G09G2310/0286 , G09G2310/0297 , H01L21/02565 , H01L27/12 , H01L27/1214 , H01L27/1225 , H01L27/1259 , H01L29/12 , H01L29/4908 , H01L29/513 , H01L29/518
Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. The increase in the numbers of gate lines and signal lines makes it difficult to mount an IC chip having a driver circuit for driving the gate line and the signal line by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit driving the pixel portion are provided over the same substrate. The pixel portion and at least a part of the driver circuit are formed using thin film transistors in each of which an oxide semiconductor is used. Both the pixel portion and the driver circuit are provided over the same substrate, whereby manufacturing costs are reduced.
Abstract translation: 随着显示装置的定义的增加,像素的数量增加,因此栅极线和信号线的数量增加。 栅极线和信号线的数量的增加使得难以安装具有用于通过接合等驱动栅极线和信号线的驱动电路的IC芯片,这导致制造成本的增加。 驱动像素部的像素部和驱动电路设置在同一基板上。 像素部分和驱动电路的至少一部分使用薄膜晶体管形成,其中每个使用氧化物半导体。 像素部分和驱动电路均设置在相同的基板上,由此降低了制造成本。
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