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260 条记录 (耗时 0.032 秒)

    Image sensor with light guides
    131.
    发明申请
    Image sensor with light guides 有权
    带导光板的图像传感器

    公开(公告)号：US20060014314A1

    公开(公告)日：2006-01-19

    申请号：US11229655

    申请日：2005-09-20

    申请人： Dun-Nian Yaung ,  Chung-Yi Yu

    发明人： Dun-Nian Yaung ,  Chung-Yi Yu

    IPC分类号： H01L21/00

    CPC分类号： H01L27/14685 ,  H01L27/1462 ,  H01L27/14623 ,  H01L27/14625

    摘要： An image sensor device and fabrication method thereof. An image sensing array is formed in a substrate, wherein the image sensing array comprises a plurality of photosensors with spaces therebetween. A first dielectric layer with a first refractive index is formed overlying the spaces but not the photosensors. A conformal second dielectric layer with a second refractive index is formed on a sidewall of the first dielectric layer. A third dielectric layer with a third refractive index is formed overlying the photosensors but not the spaces. The third refractive index is greater than the second refractive index. A light guide constructed by the second and third dielectric layers is formed overlying each photosensor, thereby preventing incident light from striking other photosensors.

    摘要翻译： 一种图像传感器装置及其制造方法。 图像感测阵列形成在基板中，其中图像感测阵列包括在其间具有间隔的多个光电传感器。 具有第一折射率的第一介电层形成在空间上而不是光电传感器上。 在第一介电层的侧壁上形成具有第二折射率的共形的第二介电层。 形成具有第三折射率的第三介电层，覆盖光电传感器而不是空间。 第三折射率大于第二折射率。 由第二和第三电介质层构成的导光体形成在每个光电传感器上，从而防止入射光撞击其他感光体。

    Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method thereof
    132.
    发明申请
    Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method thereof 有权
    浸水MOS器件和单面水银MOS器件及其同时制造方法

    公开(公告)号：US20050164440A1

    公开(公告)日：2005-07-28

    申请号：US11084305

    申请日：2005-03-18

    申请人： Dun-Nian Yaung ,  Sou-Kuo Wu ,  Ho-Ching Chien

    发明人： Dun-Nian Yaung ,  Sou-Kuo Wu ,  Ho-Ching Chien

    IPC分类号： H01L21/336 ,  H01L21/8242 ,  H01L27/06 ,  H01L27/108 ,  H01L27/146 ,  H01L21/8234

    CPC分类号： H01L27/10894 ,  H01L27/0629 ,  H01L27/10897 ,  H01L27/14601 ,  H01L27/14609 ,  H01L27/14689 ,  H01L29/665

    摘要： A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer and first and second doped regions. The second MOS has a second gate structure, a second spacer and third and fourth doped regions. Anisotropic etching is performed to remove part of the organic layer until the oxide layer on the first and the second gate structures is exposed, wherein a remaining organic layer is left above the substrate. The oxide layer on the first and the second gate structures is removed. The remaining organic layer is removed. The oxide layer on the first, second, and third doped regions is removed. Thus, a silicide layer cannot form on the fourth doped region.

    摘要翻译： 一种在半导体衬底上制造水化MOS和单面水化MOS器件的方法。 在第一和第二MOS器件和衬底上依次形成保形氧化物层和有机层。 第一MOS具有第一栅极结构，第一间隔物以及第一和第二掺杂区域。 第二MOS具有第二栅极结构，第二间隔物和第三和第四掺杂区域。 进行各向异性蚀刻以除去部分有机层，直到暴露出第一和第二栅极结构上的氧化物层，其中剩余的有机层留在衬底上。 去除第一和第二栅极结构上的氧化物层。 剩下的有机层被去除。 去除第一，第二和第三掺杂区域上的氧化物层。 因此，在第四掺杂区域上不能形成硅化物层。

    Self-aligned rear electrode for diode array element
    134.
    发明授权
    Self-aligned rear electrode for diode array element 失效
    用于二极管阵列元件的自对准后电极

    公开(公告)号：US06852566B2

    公开(公告)日：2005-02-08

    申请号：US10386871

    申请日：2003-03-12

    申请人： Dun-Nian Yaung

    发明人： Dun-Nian Yaung

    IPC分类号： H01L21/00 ,  H01L27/146 ,  H01L29/15 ,  H01L31/075 ,  H01L33/00

    CPC分类号： H01L27/14687 ,  H01L27/14609 ,  H01L27/14643

    摘要： A PIN active pixel sensor array including self aligned encapsulated electrodes and a method for forming the same the method including forming an electrically conductive layer over a substrate; forming a first doped semiconductor layer over the conductive layer; photolithographically patterning and etching through a thickness portion of the first doped semiconductor layer and conductive layer to expose the substrate to form a plurality of spaced apart electrodes having an upper portion comprising the first doped semiconductor layer; blanket depositing a second doped semiconductor layer to cover the spaced apart electrodes including the exposed substrate; and, etching through at least a thickness portion of the second doped semiconductor layer.

    摘要翻译： 一种包括自对准密封电极的PIN有源像素传感器阵列及其形成方法，包括在衬底上形成导电层; 在所述导电层上形成第一掺杂半导体层; 光刻地图案化和蚀刻穿过第一掺杂半导体层和导电层的厚度部分以暴露衬底以形成多个间隔开的电极，其具有包括第一掺杂半导体层的上部; 覆盖沉积第二掺杂半导体层以覆盖包括暴露的衬底的间隔开的电极; 并且蚀刻通过至少第二掺杂半导体层的厚度部分。

    Integrated high performance MOS tunneling LED in ULSI technology
    135.
    发明授权
    Integrated high performance MOS tunneling LED in ULSI technology 失效
    集成高性能MOS隧道LED在ULSI技术

    公开(公告)号：US06806521B2

    公开(公告)日：2004-10-19

    申请号：US10338138

    申请日：2003-01-08

    申请人： Dun-Nian Yaung ,  Kuo-Ching Huang

    发明人： Dun-Nian Yaung ,  Kuo-Ching Huang

    IPC分类号： H01L31062

    CPC分类号： H01L27/15 ,  H01L33/0004

    摘要： A new method and structure for the combined creation of CMOS devices and LED devices. The process starts with a substrate over the surface of which are designated a first surface region for the creation of CMOS devices there-over and a second surface region for the creation of LED devices there-over. A relatively thick layer of gate oxide is created over the surface of the substrate. The first surface region is blocked by a mask of photoresist after which the second surface region is exposed to a plasma etch, thereby providing roughness to the surface of the relatively thick layer of gate oxide and reducing the thickness thereof. The blocking mask is removed, additional oxidation of the exposed surface creates a relatively thick layer of gate oxide over the first surface area and a relatively thin layer of gate oxide over the second surface area.

    摘要翻译： 一种用于组合创建CMOS器件和LED器件的新方法和结构。 该过程从其表面上的衬底指定为用于在其上形成CMOS器件的第一表面区域和用于在其上形成LED器件的第二表面区域开始。 在衬底的表面上形成较厚的栅极氧化层。 第一表面区域被光致抗蚀剂掩模阻挡，之后第二表面区域暴露于等离子体蚀刻，从而为栅极氧化物的较厚层的表面提供粗糙度并减小其厚度。 去除阻挡掩模，暴露表面的额外氧化在第一表面区域上形成相对厚的栅极氧化物层，并在第二表面区域上形成相当薄的栅极氧化物层。

    Backside structure for BSI image sensor
    136.
    发明授权
    Backside structure for BSI image sensor 有权
    BSI图像传感器的背面结构

    公开(公告)号：US09356058B2

    公开(公告)日：2016-05-31

    申请号：US13597007

    申请日：2012-08-28

    申请人： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Keng-Yu Chou ,  Shuang-Ji Tsai ,  Min-Feng Kao

    发明人： Chun-Chieh Chuang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wen-De Wang ,  Keng-Yu Chou ,  Shuang-Ji Tsai ,  Min-Feng Kao

    IPC分类号： H01L21/311 ,  H01L27/146

    CPC分类号： H01L27/1462 ,  H01L27/1464 ,  H01L27/14685

    摘要： An embodiment method for forming an image sensor includes forming an anti-reflective coating over a surface of a semiconductor supporting a photodiode, forming an etching stop layer over the anti-reflective coating, forming a buffer oxide over the etching stop layer, and selectively removing a portion of the buffer oxide through etching, the etching stop layer protecting the anti-reflective coating during the etching. An embodiment image sensor includes a semiconductor disposed in an array region and in a periphery region, the semiconductor supporting a photodiode in the array region, an anti-reflective coating disposed over a surface of the semiconductor, an etching stop layer disposed over the anti-reflective coating, a thickness of the etching stop layer over the photodiode in the array region less than a thickness of the etching stop layer in the periphery region, and a buffer oxide disposed over the etching stop layer in the periphery region.

    摘要翻译： 用于形成图像传感器的实施例方法包括在支撑光电二极管的半导体的表面上形成抗反射涂层，在抗反射涂层上形成蚀刻停止层，在蚀刻停止层上形成缓冲氧化物，并且选择性地去除 通过蚀刻的缓冲氧化物的一部分，在蚀刻期间保护抗反射涂层的蚀刻停止层。 一种实施方式的图像传感器包括：配置在阵列区域和外围区域中的半导体，支撑阵列区域中的光电二极管的半导体，设置在半导体表面上的抗反射涂层， 在阵列区域中的光电二极管上的蚀刻停止层的厚度小于周边区域中的蚀刻停止层的厚度，以及设置在周边区域的蚀刻停止层上的缓冲氧化物。

    Pad design for backside illuminated image sensor
    139.
    发明授权
    Pad design for backside illuminated image sensor 有权
    背面照明图像传感器的垫设计

    公开(公告)号：US09142586B2

    公开(公告)日：2015-09-22

    申请号：US12708167

    申请日：2010-02-18

    申请人： Wen-De Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Jeng-Shyan Lin

    发明人： Wen-De Wang ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Chun-Chieh Chuang ,  Jeng-Shyan Lin

    IPC分类号： H01L27/14 ,  H01L27/146

    CPC分类号： H01L27/14636 ,  H01L23/481 ,  H01L27/14621 ,  H01L27/1464 ,  H01L27/14683

    摘要： A semiconductor image sensor device includes first and second semiconductor substrates. A pixel array and a control circuit are formed in a first surface of the first substrate. An interconnect layer is formed over the first surface of the first substrate and electrically connects the control circuit to the pixel array. A top conducting layer is formed over the interconnect layer to have electrical connectivity with at least one of the control circuit or the pixel array via the interconnect layer. A surface of a second substrate is bonded to the top conducting layer. A conductive through-silicon-via (TSV) passes through the second substrate, and has electrical connectivity with the top conducting layer. A terminal is formed on an opposite surface of the second substrate, and electrically connected to the TSV.

    摘要翻译： 半导体图像传感器装置包括第一和第二半导体衬底。 像素阵列和控制电路形成在第一基板的第一表面中。 在第一基板的第一表面上形成互连层，并将控制电路电连接到像素阵列。 顶部导电层形成在互连层上，以经由互连层与至少一个控制电路或像素阵列电连接。 第二基板的表面接合到顶部导电层。 导电硅通孔（TSV）通过第二衬底，并且与顶部导电层具有电连接性。 端子形成在第二基板的相对表面上，并电连接到TSV。