公开(公告)号：US07254675B2

公开(公告)日：2007-08-07

申请号：US10629866

申请日：2003-07-30

Applicant: Jae-Jun Lee ,  Byung-Se So ,  Myun-Joo Park

Inventor： Jae-Jun Lee ,  Byung-Se So ,  Myun-Joo Park

IPC: G06F12/00

CPC classification number: G06F13/4086

Abstract: A memory system system includes a single in-line memory module (SIMM) which contains a memory device and a signal transmission line connected between the memory device and a connection terminal, and a dual in-line memory module (DIMM) which contains two memory devices and a signal transmission line connected between the two memory devices and a connection terminal. A length of the signal transmission line of the SIMM is longer than a length of the signal transmission line of the DIMM. The load of the memory device of the SIMM is less than the load of memory devices of the DIMM, and the longer length of the signal transmission line of the SIMM increases a signal delay time of the SIMM to compensate for the different loads of the SIMM and DIMM memory devices. The longer length of the signal transmission line of the SIMM may further compensate for a signal transmission line connected between the first and second sockets which receive the SIMM and DIMM, respectively.

Abstract translation: 一种存储系统系统包括一个单一的在线存储器模块（SIMM），它包含连接在存储器件和连接端子之间的存储器件和信号传输线，以及包含两个存储器的双列直插存储器模块（DIMM） 设备和连接在两个存储设备和连接终端之间的信号传输线。 SIMM的信号传输线的长度长于DIMM的信号传输线的长度。 SIMM的存储器件的负载小于DIMM的存储器件的负载，并且SIMM的信号传输线的较长的长度增加了SIMM的信号延迟时间以补偿SIMM的不同负载 和DIMM存储设备。 SIMM的信号传输线的较长的长度可进一步补偿连接在接收SIMM和DIMM的第一和第二插座之间的信号传输线。

公开(公告)号：US20070146175A1

公开(公告)日：2007-06-28

申请号：US11645605

申请日：2006-12-27

Applicant: Jong-hoon Kim ,  Young-chan Jang ,  Jae-Jun Lee ,  Kwang-soo Park

Inventor： Jong-hoon Kim ,  Young-chan Jang ,  Jae-Jun Lee ,  Kwang-soo Park

IPC: H03M7/34

CPC classification number: H04L25/0272

Abstract: A transmission system and method may be provided. The transmission system may transmit 2-bit data for each transmission line set and each transmission line set may include first, second and/or third transmission lines arranged in order. The first, second and/or third transmission lines may respectively transmit first, second and/or third signals each having one of first, second and/or third values such that a combination of a first electric field between the first and second transmission lines and a second electric field between the second and third transmission lines may be made depending on a logic state of the 2-bit data. The transmission system may transmit differential signals using a smaller number of transmission lines and the transmission system may transmit a larger number of signals in the same circuit area.

Abstract translation: 可以提供传输系统和方法。 传输系统可以传送每个传输线路组的2位数据，并且每个传输线路组可以包括按顺序排列的第一，第二和/或第三传输线。 第一，第二和/或第三传输线可以分别发送分别具有第一，第二和/或第三值之一的第一，第二和/或第三信号，使得第一和第二传输线之间的第一电场的组合和 第二和第三传输线之间的第二电场可以根据2位数据的逻辑状态来进行。 传输系统可以使用较少数量的传输线来传输差分信号，并且传输系统可以在相同的电路区域中发送更多数量的信号。

公开(公告)号：US20070082248A1

公开(公告)日：2007-04-12

申请号：US11580733

申请日：2006-10-12

Applicant: Jae-jun Lee ,  Myung-sup Jung ,  Do-yun Kim ,  Jin-gyu Lee ,  Sang-kook Mah

Inventor： Jae-jun Lee ,  Myung-sup Jung ,  Do-yun Kim ,  Jin-gyu Lee ,  Sang-kook Mah

IPC: H01M8/10 ,  C07F9/02 ,  C07C309/00 ,  C07C63/00

CPC classification number: C07C309/11 ,  C07C2603/92 ,  C07F9/3808 ,  H01M8/1025 ,  H01M8/1027 ,  H01M8/103 ,  H01M8/1032 ,  H01M8/1044 ,  H01M8/1048 ,  H01M2300/0082 ,  H01M2300/0091

Abstract: A solid acid having a core of calixarene or calix resorcinarene. The solid acid is an ion conducting compound in which at least one of the hydroxyl groups is substituted by an organic group having a cation exchange group at a terminal end, a polymer electrolyte membrane including the same, and a fuel cell using the polymer electrolyte membrane. The polymer electrolyte membrane can provide low methanol crossover and high ionic conductivity. Accordingly, a fuel cell having high efficiency can be obtained by using the polymer electrolyte membrane.

Abstract translation: 具有杯芳烃或杯芳烃间苯二酚核心的固体酸。 固体酸是离子导电化合物，其中至少一个羟基被末端具有阳离子交换基团的有机基团，包含该有机基团的聚合物电解质膜和使用该聚合物电解质膜的燃料电池 。 聚合物电解质膜可以提供低甲醇交叉和高离子电导率。 因此，通过使用高分子电解质膜可以得到效率高的燃料电池。

公开(公告)号：US07008758B2

公开(公告)日：2006-03-07

申请号：US10713254

申请日：2003-11-17

Applicant: Jong Jin Park ,  Jae Jun Lee ,  Myung Sup Jung

Inventor： Jong Jin Park ,  Jae Jun Lee ,  Myung Sup Jung

IPC: G03F7/038 ,  G03F7/20 ,  G03F7/30

CPC classification number: H05K3/02 ,  B82Y10/00 ,  B82Y30/00 ,  G03F7/027 ,  H01L51/0048 ,  H01L51/0052 ,  H05K2201/026 ,  H05K2201/0323 ,  H05K2203/0514 ,  Y10S977/89

Abstract: Disclosed herein is a method of forming a negative pattern of carbon nanotubes through: modifying the surfaces of carbon nanotubes to have double bond-containing functional group capable of participating in radical polymerization; coating a substrate with a liquid coating composition prepared by dispersing the surface-modified carbon nanotubes in an organic solvent along with a photoinitiator; exposing the film to UV light through a photomask to induce radical polymerization of the carbon nanotubes; and developing the film. By virtue of the present invention, desired patterns of carbon nanotubes can be easily made on the surfaces of various substrates according to the conventional photolithography procedure.

Abstract translation: 本文公开了通过以下方式形成碳纳米管的负型图案：将碳纳米管的表面改性为能够参与自由基聚合的具有双键的官能团; 用通过将表面改性的碳纳米管与光引发剂一起分散在有机溶剂中制备的液体涂料组合物涂布基材; 通过光掩模将膜暴露于UV光以引起碳纳米管的自由基聚合; 并开发电影。 根据本发明，可以根据常规的光刻步骤在各种基板的表面上容易地制造所需的碳纳米管图案。

公开(公告)号：US20050212551A1

公开(公告)日：2005-09-29

申请号：US10997406

申请日：2004-11-24

Applicant: Byung-Se So ,  Jeong-Hyeon Cho ,  Jae-Jun Lee

Inventor： Byung-Se So ,  Jeong-Hyeon Cho ,  Jae-Jun Lee

IPC: G06F12/00 ,  G11C5/00 ,  G11C7/10 ,  G11C11/401 ,  H03K19/003 ,  H04L25/02

CPC classification number: H04L25/0278 ,  G11C5/04 ,  G11C7/1078 ,  G11C7/1084

Abstract: For ODT (on-die termination) control within a memory module system, just one pin from the memory controller is used for sending command signals indicating an activated one of the memory devices. The activated memory device includes components that are turned on for generating the ODT control signal for controlling an ODT circuit of inactivated memory device(s). The components for generating an ODT control signal within the inactivated memory devices are turned off for minimized power consumption.

Abstract translation: 对于存储器模块系统内的ODT（片上终端）控制，仅使用来自存储器控制器的一个引脚来发送指示已激活的存储器件的命令信号。 激活的存储器件包括被开启以产生用于控制非激活存储器件的ODT电路的ODT控制信号的组件。 用于在非激活的存储器件内产生ODT控制信号的组件被关闭以最小化功率消耗。

公开(公告)号：US20050089106A1

公开(公告)日：2005-04-28

申请号：US10913359

申请日：2004-08-09

Applicant: Jeong-Hyeon Cho ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Byung-Se So

Inventor： Jeong-Hyeon Cho ,  Jae-Jun Lee ,  Jong-Hoon Kim ,  Byung-Se So

IPC: H04B3/50 ,  H04L25/14 ,  H04B1/69

CPC classification number: H04L25/14

Abstract: A data transmission system and method characterized by the use of multiple differential output amplifiers to transmits differential data signals that vary in accordance with control signals derived from a reference data output strobe signal, and multiple differential amplifiers to receive the differential data signals and detect such variations to generate a data input strobe signal corresponding to the data output strobe signal.

Abstract translation: 一种数据传输系统和方法，其特征在于使用多个差分输出放大器来传输根据从参考数据输出选通信号导出的控制信号而变化的差分数据信号，以及多个差分放大器以接收差分数据信号并检测这些变化 以产生对应于数据输出选通信号的数据输入选通信号。

公开(公告)号：US20050042539A1

公开(公告)日：2005-02-24

申请号：US10784806

申请日：2004-02-24

Applicant: Jin-Baek Kim ,  Tae-Hwan OH ,  Jae-Hak Choi ,  Jae-Jun Lee

Inventor： Jin-Baek Kim ,  Tae-Hwan OH ,  Jae-Hak Choi ,  Jae-Jun Lee

IPC: C07D313/06 ,  C08F24/00 ,  G03C1/73 ,  G03C1/76 ,  G03F7/039 ,  G03F7/20 ,  G03F7/30

CPC classification number: C07D313/06 ,  G03F7/0395 ,  G03F7/0397 ,  Y10S430/106 ,  Y10S430/111 ,  Y10S430/115 ,  Y10S430/143 ,  Y10S430/146 ,  Y10S430/167

Abstract: Disclosed herein is a novel norbornene, acrylate or methacrylate monomer as a photoresist monomer containing an oxepan-2-one group. Further disclosed are photoresist compositions comprising a polymer prepared from the monomer, methods for preparing the photoresist compositions, and methods for forming photoresist patterns using the photoresist compositions.

Abstract translation: 本文公开了一种新颖的降冰片烯，丙烯酸酯或甲基丙烯酸酯单体作为含有氧杂环庚烷-2-酮基团的光致抗蚀剂单体。 还公开了包含由单体制备的聚合物，制备光致抗蚀剂组合物的方法，以及使用光致抗蚀剂组合物形成光致抗蚀剂图案的方法的光致抗蚀剂组合物。

公开(公告)号：US20050036350A1

公开(公告)日：2005-02-17

申请号：US10853353

申请日：2004-05-26

Applicant: Byung-se So ,  Jeong-hyeon Cho ,  Jung-joon Lee ,  Jae-jun Lee

Inventor： Byung-se So ,  Jeong-hyeon Cho ,  Jung-joon Lee ,  Jae-jun Lee

IPC: H01L25/11 ,  G11C5/06 ,  G11C7/10 ,  G11C8/06 ,  H05K1/14 ,  H05K1/18

CPC classification number: G11C5/063 ,  G11C7/10 ,  G11C8/06 ,  H05K1/144 ,  H05K1/181

Abstract: In the memory module, a buffer is disposed on one of at least two circuit boards in the memory module. The buffer is for buffering signals for memory chips on at least two circuit boards in the memory module.

Abstract translation: 在存储器模块中，缓冲器被布置在存储器模块中的至少两个电路板中的一个上。 缓冲器用于缓冲存储器模块中至少两个电路板上的存储器芯片的信号。

公开(公告)号：US06615301B1

公开(公告)日：2003-09-02

申请号：US09264502

申请日：1999-03-08

Applicant: Jae-Jun Lee ,  Sang-Hyun Han

Inventor： Jae-Jun Lee ,  Sang-Hyun Han

IPC: G06F1342

CPC classification number: H04L25/029 ,  G06F13/4072 ,  H04L25/0272 ,  H04L25/0292

Abstract: An integrated bus interface circuit for a computer system for communicating between a serial bus and a function device. The bus interface circuit includes a voltage regulator, a bidirectional serial data transceiver, a serial interface engine, and a device controller. The voltage regulator supplies a first power supply voltage (e.g., 3.3 volts) in a first voltage range by using a second power supply voltage (e.g., 5 volts) in a second voltage range. The transceiver converts a plurality of bus-specific data signals (e.g., 3.3V modulated format) into a plurality of interface-specific data signals (e.g., 5V modulated format), and conversely, by using the first and second power supply voltages. The serial interface engine performs an interface between the interface-specific signals and a plurality of device-specific signals (e.g., 5V binary format). The device controller controls the function device in response to the device-specific signals.

Abstract translation: 一种用于在串行总线和功能装置之间进行通信的计算机系统的集成总线接口电路。 总线接口电路包括电压调节器，双向串行数据收发器，串行接口引擎和设备控制器。 电压调节器通过在第二电压范围内使用第二电源电压（例如5伏特）来在第一电压范围内提供第一电源电压（例如，3.3伏）。 收发器将多个总线专用数据信号（例如，3.3V调制格式）转换成多个接口专用数据信号（例如，5V调制格式），相反地，通过使用第一和第二电源电压。 串行接口引擎在接口特定信号和多个设备特定信号（例如，5V二进制格式）之间执行接口。 设备控制器响应于特定于设备的信号控制功能设备。

公开(公告)号：US06333762B1

公开(公告)日：2001-12-25

申请号：US09226130

申请日：1999-01-07

Applicant: Joong-Sun Yoo ,  Chang-Wan Hong ,  Jong-Chul Choi ,  Yeon-Mo Jeong ,  Jae-Jun Lee

Inventor： Joong-Sun Yoo ,  Chang-Wan Hong ,  Jong-Chul Choi ,  Yeon-Mo Jeong ,  Jae-Jun Lee

IPC: H04N701

CPC classification number: G06T3/4007 ,  G09G1/16 ,  H04N7/0135

Abstract: A scan format converter for converting a video format by bi-sigmoid interpolation. In the scan format converter, a memory controller has a look-up table at which first and second displacement values for pixel points of a video format to be converted are stored, controls transmission of color signals input from an external device, and reads the first and second displacement values for the pixel points of the color signals from the look-up table. A mode detector detects horizontal and vertical sync signals input from the external device and outputs a video format detection signal representing a mode of the currently input video format to the memory controller. A memory temporarily stores the color signals. A color signal logic circuit has a plurality of bi-sigmoid interpolation tables at which sigmoid interpolation values according to a color signal level difference between two pixel points are stored, and bi-sigmoid-interpolates the color signal levels of the input pixel points with respect to an x-axis and a y-axis according to the first and second displacement values input from the memory controller. A sync generator generates a sync signal to the color signal logic circuit.

Abstract translation: 一种用于通过双S形插值转换视频格式的扫描格式转换器。 在扫描格式转换器中，存储器控制器具有用于存储要转换的视频格式的像素点的第一和第二位移值的查找表，控制从外部设备输入的彩色信号的传输，并且读取第一 以及来自查找表的彩色信号的像素点的第二位移值。 模式检测器检测从外部设备输入的水平和垂直同步信号，并将表示当前输入的视频格式的模式的视频格式检测信号输出到存储器控制器。 存储器暂时存储颜色信号。 彩色信号逻辑电路具有多个双S形内插表，其中存储根据两个像素点之间的颜色信号电平差的S形内插值，并且双S形相互插入输入像素点的颜色信号电平 根据从存储器控制器输入的第一和第二位移值到x轴和y轴。 同步发生器产生到彩色信号逻辑电路的同步信号。