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    Uncoupling protein 5 (UCP5)
    141.
    发明授权
    Uncoupling protein 5 (UCP5) 有权
    解偶联蛋白5（UCP5）

    公开(公告)号：US07342102B2

    公开(公告)日：2008-03-11

    申请号：US11283522

    申请日：2005-11-18

    Applicant: Sean Adams ,  James Pan

    Inventor： Sean Adams ,  James Pan

    IPC: C07K14/00 ,  C12P21/06 ,  C12N15/63 ,  C07H21/04

    CPC classification number: C07K14/4702 ,  C07K2319/30

    Abstract: The present invention is directed to novel polypeptides having homology to certain human uncoupling proteins (“UCPs”) and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention, and methods for producing the polypeptides of the present invention.

    Abstract translation: 本发明涉及与某些人解偶联蛋白（“UCP”）和编码那些多肽的核酸分子具有同源性的新型多肽。 本文还提供了包含那些核酸序列的载体和宿主细胞，包含与异源多肽序列融合的本发明多肽的嵌合多肽分子，与本发明的多肽结合的抗体，以及本发明多肽的制备方法 发明。

    Mesa isolation technology for extremely thin silicon-on-insulator semiconductor devices
    147.
    发明授权
    Mesa isolation technology for extremely thin silicon-on-insulator semiconductor devices 有权
    用于极薄绝缘体上半导体器件的Mesa隔离技术

    公开(公告)号：US07202123B1

    公开(公告)日：2007-04-10

    申请号：US10882208

    申请日：2004-07-02

    Applicant: James Pan

    Inventor： James Pan

    IPC: H01L21/336

    CPC classification number: H01L21/26506 ,  H01L29/6659 ,  H01L29/7833

    Abstract: Silicon-on-insulator (SOI) structures with silicon layers less than 20 nm in thickness are used to form extremely thin silicon-on-insulator (ETSOI) semiconductor devices. ETSOI semiconductor devices can be efficiently manufactured by mesa isolation techniques. A method of forming a plurality of semiconductor devices is provided comprising a SOI structure. The SOI structure comprises a substrate, an insulating layer overlying the substrate, and a silicon layer overlying the insulating layer, wherein the silicon layer has a thickness less than 20 nm. The silicon layer is patterned to create at least two laterally spaced apart silicon layers. A semiconductor device is formed at each of the at least two laterally spaced apart silicon layers.

    Abstract translation: 使用厚度小于20nm的硅层的绝缘体上硅（SOI）结构来形成非常薄的绝缘体上硅（ETSOI）半导体器件。 ETSOI半导体器件可以通过台面隔离技术有效地制造。 提供一种形成多个半导体器件的方法，其包括SOI结构。 SOI结构包括衬底，覆盖衬底的绝缘层和覆盖绝缘层的硅层，其中硅层的厚度小于20nm。 图案化硅层以产生至少两个横向间隔开的硅层。 在所述至少两个横向间隔开的硅层中的每一个处形成半导体器件。

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