公开(公告)号：US20200161230A1

公开(公告)日：2020-05-21

申请号：US16194377

申请日：2018-11-18

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John Knickerbocker ,  Bing Dang ,  Raymond Horton ,  Joana Maria

IPC: H01L23/498 ,  H01L23/48 ,  H01L21/768 ,  H01L21/48 ,  H01L21/20 ,  H01L21/683

Abstract: Die stacks and methods of making die stacks with very thin dies are disclosed. The die surfaces remain flat within a 5 micron tolerance despite the thinness of the die and the process steps of making the die stack. A residual flux height is kept below 50% of the spacing distance between adjacent surfaces or structures, e.g. in the inter-die spacing.

公开(公告)号：US10651036B2

公开(公告)日：2020-05-12

申请号：US16550261

申请日：2019-08-25

Applicant: International Business Machines Corporation

Inventor： Russell A. Budd ,  Qianwen Chen ,  Bing Dang ,  Jeffrey D. Gelorme ,  Li-wen Hung ,  John U. Knickerbocker

IPC: H01L21/20 ,  B24B7/22 ,  H01L21/683 ,  H01L23/544 ,  H01L23/498 ,  H01L21/56

Abstract: Small size chip handling and electronic component integration are accomplished using handle fixturing to transfer die or other electronic components from a full area array to a targeted array. Area array dicing of a thinned device wafer on a handle wafer/panel may be followed by selective or non-selective de-bonding of targeted die or electronic components from the handle wafer and optional attachment to a carrier such as a transfer head or tape. Alignment fiducials may facilitate precision alignment of the transfer head or tape to the device wafer and subsequently to the targeted array. Alternatively, the dies or other electronic elements are transferred selectively from either a carrier or the device wafer to the targeted array.

公开(公告)号：US10586726B2

公开(公告)日：2020-03-10

申请号：US15855188

申请日：2017-12-27

Applicant: International Business Machines Corporation

Inventor： Paul S. Andry ,  Bing Dang ,  Jeffrey Donald Gelorme ,  Li-Wen Hung ,  John U. Knickerbocker ,  Cornelia Tsang Yang

IPC: H01L21/683 ,  H01L21/78

Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The release layer comprises at least one additive that adjusts a frequency of electro-magnetic radiation absorption property of the release layer. The additive comprises, for example, a 355 nm chemical absorber and/or chemical absorber for one of more wavelengths in a range comprising 600 nm to 740 nm. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The the at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

公开(公告)号：US20200075906A1

公开(公告)日：2020-03-05

申请号：US16121307

申请日：2018-09-04

Applicant: International Business Machines Corporation

Inventor： Qianwen Chen ,  Bing Dang ,  Bo Wen ,  Marlon Agno ,  John Knickerbocker

IPC: H01M2/02 ,  H01M2/08 ,  H01M10/0585

Abstract: Techniques regarding a thin film battery, which can comprise one or more sealing layers, and a method of manufacturing thereof are provided. For example, one or more embodiments described herein can regard an apparatus that can comprise a thin film battery cell encapsulated in a multi-layer stack comprising an adhesive layer located between a first substrate layer and a second substrate layer. The apparatus can also comprise a metal sealing layer at least partially surrounding the multi-layer stack.

公开(公告)号：US10573625B2

公开(公告)日：2020-02-25

申请号：US16014887

申请日：2018-06-21

Applicant: International Business Machines Corporation

Inventor： Stephen W. Bedell ,  Bing Dang ,  Ning Li ,  Frank R. Libsch ,  Devendra K. Sadana

IPC: H01L33/30 ,  H01L25/075 ,  H01L33/32 ,  H01L33/62

Abstract: A structure containing a vertical light emitting diode (LED) is provided. The vertical LED is present in an opening located in a display substrate, and the vertical LED is coupled to a back contact structure via a magnetic back contact structure. A first top contact structure contacts a topmost surface of the vertical LED and a second top contact structure contacts a surface of the back contact structure.

公开(公告)号：US10573538B2

公开(公告)日：2020-02-25

申请号：US16282432

申请日：2019-02-22

Applicant: International Business Machines Corporation

Inventor： Paul S. Andry ,  Bing Dang ,  Jeffrey Donald Gelorme ,  Li-Wen Hung ,  John U. Knickerbocker ,  Cornelia Tsang Yang

IPC: H01L21/56 ,  H01L21/67 ,  H01L21/683 ,  H01L23/00

Abstract: Various embodiments process semiconductor devices. In one embodiment, a release layer is applied to a handler. The at least one singulated semiconductor device is bonded to the handler. The at least one singulated semiconductor device is packaged while it is bonded to the handler. The release layer is ablated by irradiating the release layer through the handler with a laser. The the at least one singulated semiconductor device is removed from the transparent handler after the release layer has been ablated.

公开(公告)号：US10559555B2

公开(公告)日：2020-02-11

申请号：US15940513

申请日：2018-03-29

Applicant: International Business Machines Corporation

Inventor： Stephen W. Bedell ,  Bing Dang ,  Ning Li ,  Frank R. Libsch ,  Devendra K. Sadana

IPC: H01L25/075 ,  H01L33/62

Abstract: Methods of transferring micro-array LEDs of various colors onto a surface of a display substrate are provided. The transferring includes releasing micro-LEDs of a specific color from a structure that includes a releasable material onto a display substrate. The releasable material may be a laser ablatable material or a material that is readily dissolved in a specific etchant.

公开(公告)号：US10546836B2

公开(公告)日：2020-01-28

申请号：US15272804

申请日：2016-09-22

Applicant: International Business Machines Corporation

Inventor： Bing Dang ,  Li-Wen Hung ,  John U. Knickerbocker ,  Jae-Woong Nah

IPC: H01L25/065 ,  H01L23/00 ,  H01L21/02 ,  H01L25/00

Abstract: A multi-layer wafer and method of manufacturing such wafer are provided. The method includes creating under bump metallization (UMB) pads on each of the two heterogeneous wafers; applying a conductive means above the UMB pads on at least one of the two heterogeneous wafers; and low temperature bonding the two heterogeneous wafers to adhere the UMB pads together via the conductive means. At least one stress compensating polymer layer may be applied to at least one of two heterogeneous wafers. The multi-layer wafer comprises two heterogeneous wafers, each of the heterogeneous wafer having UMB pads and at least one of the heterogeneous wafers having a stress compensating polymer layer and a conductive means applied above the UMB pads on at least one of the two heterogeneous wafers. The two heterogeneous wafers low temperature bonded together to adhere the UMB pads together via the conductive means.

公开(公告)号：US20190326190A1

公开(公告)日：2019-10-24

申请号：US16432377

申请日：2019-06-05

Applicant: International Business Machines Corporation

Inventor： Qianwen Chen ,  Bing Dang ,  John Knickerbocker ,  Joana Sofia Branquinho Teresa Maria

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/683 ,  H01L25/00 ,  H01L21/56 ,  H01L25/065

Abstract: A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

公开(公告)号：US10407791B2

公开(公告)日：2019-09-10

申请号：US15851846

申请日：2017-12-22

Applicant: International Business Machines Corporation

Inventor： Qianwen Chen ,  Bing Dang ,  Yu Luo ,  Joana Sofia Branquinho Teresa Maria

IPC: C25D5/02 ,  C25D7/04 ,  H01L21/288 ,  B23K35/26 ,  C25D17/12 ,  C25D3/60 ,  C25D3/30 ,  C25D3/54 ,  C25D7/12 ,  C25D17/00 ,  H01L23/14

Abstract: A method provides a structure that includes a substrate having a metal layer disposed on a surface and a metal feature disposed on the metal layer. The method further includes immersing the structure in a plating bath contained in an electroplating cell, the plating bath containing a selected solder material; applying a voltage potential to the structure, where the structure functions as a working electrode in combination with a reference electrode and a counter electrode that are also immersed in the plating bath; and maintaining the voltage potential at a predetermined value to deposit the selected solder material selectively only on the metal feature and not on the metal layer. An apparatus configured to practice the method is also disclosed.