Abstract:
A stacked image sensor includes a first plurality of photodiodes, including a first photodiode and a second photodiode, disposed in a first semiconductor material. A thickness of the first semiconductor material proximate to the first photodiode is less than the thickness of the first semiconductor material proximate to the second photodiode. A second plurality of photodiodes is disposed in a second semiconductor material. The second plurality of photodiodes is optically aligned with the first plurality of photodiodes. An interconnect layer is disposed between the first semiconductor material and the second semiconductor material. The interconnect layer includes an optical shield disposed between the second photodiode and a third photodiode included in the second plurality of photodiodes. The optical shield prevents a first portion of image light from reaching the third photodiode.
Abstract:
An image sensor includes a plurality of photodiodes disposed in a semiconductor material, and a through-semiconductor-via coupled to a negative voltage source. Deep trench isolation structures are disposed between individual photodiodes in the plurality of photodiodes to electrically and optically isolate the individual photodiodes. The deep trench isolation structures include a conductive material coupled to the through-semiconductor-via, and a dielectric material disposed on sidewalls of the deep trench isolation structures between the semiconductor material and the conductive material.
Abstract:
A method of image sensor fabrication includes providing a semiconductor material, an insulation layer, and a logic layer, where the semiconductor material includes a plurality of photodiodes. A through-semiconductor-via is formed which extends from the semiconductor material, through the insulation layer, and into the logic layer. The through-semiconductor-via is capped with a capping layer. A metal pad is disposed in a first trench in the semiconductor material. Insulating material is deposited on the capping layer, and in the first trench in the semiconductor material. A resist is deposited in a second trench in the insulating material, and the second trench in the insulating material is aligned with the metal pad. The insulating material is removed to expose the capping layer, and a portion of the capping layer disposed proximate to the plurality of photodiodes is also removed. A metal grid is formed proximate to the plurality of photodiodes.
Abstract:
A complementary metal oxide semiconductor (CMOS) image sensor with peninsular ground contacts includes (a) a substrate having a plurality of pixel units arranged in rows of pixel units and (b) a plurality of ground contacts for grounding the pixel units, wherein the ground contacts are formed in respective peninsular regions of the substrate within respective ones of the pixel units, and wherein each of the peninsular regions is only partly enclosed by a shallow trench isolation and the peninsular regions have alternating orientation along each of the rows of pixel units.
Abstract:
A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry on the front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.
Abstract:
An image sensor including a plurality of photodiodes disposed in a semiconductor layer and a plurality of deep trench isolation regions disposed in the semiconductor layer. The plurality of deep trench isolation regions include: (1) an oxide layer disposed on an inner surface of the plurality of deep trench isolation regions and (2) a conductive fill disposed in the plurality of deep trench isolation regions where the oxide layer is disposed between the semiconductor layer and the conductive fill. A plurality of pinning wells is also disposed in the semiconductor layer, and the plurality of pinning wells in combination with the plurality of deep trench isolation regions separate individual photodiodes in the plurality of photodiodes. A fixed charge layer is disposed on the semiconductor layer, and the plurality of deep trench isolation regions are disposed between the plurality of pinning wells and the fixed charge layer.
Abstract:
A monolithic backside-sensor-illumination (BSI) image sensor has a sensor array is tiled with a multiple-pixel cells having a first pixel sensor primarily sensitive to red light, a second pixel sensor primarily sensitive to red and green light, and a third pixel sensor having panchromatic sensitivity, the pixel sensors laterally adjacent each other. The image sensor determines a red, a green, and a blue signal comprising by reading the red-sensitive pixel sensor of each multiple-pixel cell to determine the red signal, reading the sensor primarily sensitive to red and green light to determine a yellow signal and subtracting the red signal to determine a green signal. The image sensor reads the panchromatic-sensitive pixel sensor to determine a white signal and subtracts the yellow signal to provide the blue signal.
Abstract:
A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element.
Abstract:
A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material to accumulate image charge. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is coupled to selectively transfer the image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure disposed in the semiconductor material. The DTI structure isolates the first region of the semiconductor material on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. The DTI structure includes a doped semiconductor material disposed inside the DTI structure that is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion.
Abstract:
An image sensor including a plurality of photodiodes disposed in a semiconductor layer and a plurality of deep trench isolation regions disposed in the semiconductor layer. The plurality of deep trench isolation regions include: (1) an oxide layer disposed on an inner surface of the plurality of deep trench isolation regions and (2) a conductive fill disposed in the plurality of deep trench isolation regions where the oxide layer is disposed between the semiconductor layer and the conductive fill. A plurality of pinning wells is also disposed in the semiconductor layer, and the plurality of pinning wells in combination with the plurality of deep trench isolation regions separate individual photodiodes in the plurality of photodiodes. A fixed charge layer is disposed on the semiconductor layer, and the plurality of deep trench isolation regions are disposed between the plurality of pinning wells and the fixed charge layer.