公开(公告)号：US20170256650A1

公开(公告)日：2017-09-07

申请号：US15598683

申请日：2017-05-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiromichi GODO ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L21/02

CPC classification number: H01L29/78693 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.

公开(公告)号：US20170236943A1

公开(公告)日：2017-08-17

申请号：US15584264

申请日：2017-05-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78618

Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

公开(公告)号：US20170207349A1

公开(公告)日：2017-07-20

申请号：US15478617

申请日：2017-04-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Toshinari SASAKI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G02F1/167 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/04 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.

公开(公告)号：US20170040409A1

公开(公告)日：2017-02-09

申请号：US15296270

申请日：2016-10-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Rihito WADA ,  Yoko CHIBA

IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L27/3276 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/7869 ,  H01L51/5221

Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

Abstract translation: 显示装置包括其中像素以矩阵形式布置的像素部分，该像素包括具有不同量的氧并且具有通道保护层的至少两种氧化物半导体层的组合的反交错薄膜晶体管 半导体层作为与栅电极层重叠的沟道形成区域和与反交错薄膜晶体管电连接的像素电极层。 在该显示装置的像素部的周围，设置由与像素电极层相同的材料构成的导电层的焊盘部。 另外，导电层与形成在对置基板上的公共电极层电连接。

公开(公告)号：US20160380111A1

公开(公告)日：2016-12-29

申请号：US15263997

申请日：2016-09-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/24

CPC classification number: H01L29/78618 ,  G02F1/133345 ,  G02F1/133528 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2201/123 ,  G09G3/3674 ,  G09G2310/0286 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/247 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

Abstract translation: 一个实施例是包括反向交错（底栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 电极层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

公开(公告)号：US20160336456A1

公开(公告)日：2016-11-17

申请号：US15220532

申请日：2016-07-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masayuki SAKAKURA ,  Ryosuke WATANABE ,  Junichiro SAKATA ,  Kengo AKIMOTO ,  Akiharu MIYANAGA ,  Takuya HIROHASHI ,  Hideyuki KISHIDA

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/45 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/78696

Abstract: In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.

Abstract translation: 在使用氧化物半导体形成沟道形成区域的沟道保护薄膜晶体管中，使用通过热处理脱水或脱氢的氧化物半导体层作为有源层，包括纳米晶体的晶体区域包含在表面 并且其余部分是无定形的或由非晶/非晶体和微晶体的混合物形成，其中非晶区域用微晶点缀。 通过使用具有这种结构的氧化物半导体层，可以防止由于进入水分或从表面部分去除氧气或从表面部分排出而引起的n型变化和产生寄生通道，并且与源极接触电阻 可以减少漏电极。

公开(公告)号：US20160247930A1

公开(公告)日：2016-08-25

申请号：US15146980

申请日：2016-05-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Toshinari SASAKI

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L29/45 ,  H01L29/04 ,  H01L27/12 ,  H01L29/423

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  G02F1/167 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/04 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/45 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.

公开(公告)号：US20160218120A1

公开(公告)日：2016-07-28

申请号：US15090925

申请日：2016-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

IPC: H01L27/12 ,  H01L29/24 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/78606 ,  H01L29/7869

Abstract: A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs.

Abstract translation: 驱动像素部的像素部和驱动电路形成在同一基板上。 使用其中使用氧化物半导体层的反交错薄膜晶体管形成驱动电路的至少一部分，并且在用作与栅电极重叠的沟道形成区域的氧化物半导体层上设置沟道保护层 。 驱动电路以及像素部分设置在相同的基板上以降低制造成本。

公开(公告)号：US20150340508A1

公开(公告)日：2015-11-26

申请号：US14816112

申请日：2015-08-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kengo AKIMOTO

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/78603

Abstract: An object is to provide a method for manufacturing a highly reliable semiconductor device which includes a thin film transistor using an oxide semiconductor and having stable electric characteristics. In manufacture of a semiconductor device in which an oxide semiconductor is used for a channel formation region, after an oxide semiconductor film is formed, a conductive film including a metal, a metal compound, or an alloy that can absorb or adsorb moisture, a hydroxy group, or hydrogen is formed to overlap with the oxide semiconductor film with an insulating film provided therebetween. Then, heat treatment is performed in the state where the conductive film is exposed; in such a manner, activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in the conductive film is performed.

Abstract translation: 本发明的目的是提供一种用于制造高可靠性的半导体器件的方法，该半导体器件包括使用氧化物半导体并具有稳定的电特性的薄膜晶体管。 在使用氧化物半导体用于沟道形成区域的半导体器件的制造中，在形成氧化物半导体膜之后，可以使用能够吸收或吸附水分的金属，金属化合物或合金的导电膜，羟基 组或氢形成为与氧化物半导体膜重叠，其间设置有绝缘膜。 然后，在导电膜露出的状态下进行热处理; 以这种方式，执行吸附在导电膜表面上或导电膜中的水分，氧气，氢气等的活化处理。

公开(公告)号：US20150249147A1

公开(公告)日：2015-09-03

申请号：US14712254

申请日：2015-05-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Yasuo NAKAMURA

IPC: H01L29/66 ,  H01L21/3213 ,  H01L29/786

CPC classification number: H01L29/78696 ,  H01L21/02323 ,  H01L21/02565 ,  H01L21/32139 ,  H01L21/465 ,  H01L21/467 ,  H01L21/4763 ,  H01L21/47635 ,  H01L27/1225 ,  H01L29/0692 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/263 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/7869 ,  H01L29/78693

Abstract: To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.