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公开(公告)号:US20250120178A1
公开(公告)日:2025-04-10
申请号:US18931474
申请日:2024-10-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshikazu KONDO , Hideyuki KISHIDA
IPC: H10D86/60 , H01L21/02 , H01L21/477 , H10D30/01 , H10D30/67 , H10D62/80 , H10D64/62 , H10D86/01 , H10D86/40 , H10D99/00 , H10K59/12 , H10K59/121 , H10K59/123
Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
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公开(公告)号:US20200279875A1
公开(公告)日:2020-09-03
申请号:US16809980
申请日:2020-03-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshikazu KONDO , Hideyuki KISHIDA
IPC: H01L27/12 , H01L29/66 , H01L29/786 , H01L21/02 , H01L29/45 , H01L27/32 , H01L29/24 , H01L29/49 , H01L21/477
Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
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公开(公告)号:US20170040181A1
公开(公告)日:2017-02-09
申请号:US15332198
申请日:2016-10-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Hideyuki KISHIDA
IPC: H01L21/477 , H01L29/786 , H01L27/105 , G11C16/10 , H01L29/24 , G11C16/26 , G11C16/14 , H01L29/66 , H01L27/12
CPC classification number: H01L21/477 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/1368 , G02F1/137 , G02F2201/121 , G02F2201/123 , G09G3/3648 , G09G2310/08 , G09G2330/021 , G11C16/10 , G11C16/14 , G11C16/26 , H01L21/02554 , H01L21/02565 , H01L21/02573 , H01L21/02614 , H01L21/02631 , H01L21/02667 , H01L21/3228 , H01L27/1052 , H01L27/11521 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L29/247 , H01L29/66969 , H01L29/7869 , H01L29/78693 , H01L29/78696
Abstract: An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.
Abstract translation: 本发明的目的是提供一种高度可靠的半导体器件。 另一个目的是提供一种高度可靠的半导体器件的制造方法。 另一个目的是提供一种具有低功耗的半导体器件。 另一个目的是提供一种具有低功耗的半导体器件的制造方法。 此外,另一个目的是提供一种可以高质量生产率制造的半导体器件。 本发明的另一个目的是提供一种能以高质量生产率制造的半导体器件的制造方法。 去除残留在氧化物半导体层中的杂质,使得氧化物半导体层被纯化成具有非常高的纯度。 具体地说,在向氧化物半导体层中添加卤素元素之后,进行热处理从氧化物半导体层去除杂质。 卤素元素优选为氟。
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公开(公告)号:US20160079435A1
公开(公告)日:2016-03-17
申请号:US14942376
申请日:2015-11-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Toshikazu KONDO , Hideyuki KISHIDA
IPC: H01L29/786 , H01L29/45
CPC classification number: H01L27/1225 , H01L21/02554 , H01L21/02565 , H01L21/02614 , H01L21/0262 , H01L21/02631 , H01L21/477 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/1259 , H01L27/3248 , H01L27/3262 , H01L29/24 , H01L29/45 , H01L29/458 , H01L29/4908 , H01L29/66765 , H01L29/66969 , H01L29/78603 , H01L29/78606 , H01L29/78618 , H01L29/78663 , H01L29/78678 , H01L29/7869 , H01L29/78693
Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
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5.
公开(公告)号:US20160049520A1
公开(公告)日:2016-02-18
申请号:US14924857
申请日:2015-10-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Masahiro TAKAHASHI , Hideyuki KISHIDA , Akiharu MIYANAGA , Junpei SUGAO , Hideki UOCHI , Yasuo NAKAMURA
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L21/02164 , H01L21/0217 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/324 , H01L21/76801 , H01L21/76828 , H01L21/76838 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/42384 , H01L29/45 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/78606
Abstract: By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.
Abstract translation: 通过使用包含Cu的导电层作为长引线,可以抑制布线电阻的增加。 此外,包括Cu的导电层以与形成TFT的沟道区域的氧化物半导体层不重叠并被包括氮化硅的绝缘层包围的方式设置,由此Cu的扩散可以 防止 因此,可以制造高度可靠的半导体器件。 具体地说,作为半导体装置的一个实施方式的显示装置,即使在尺寸或定义增加的情况下也能够具有高的显示质量,并且稳定地工作。
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公开(公告)号:US20160043231A1
公开(公告)日:2016-02-11
申请号:US14920244
申请日:2015-10-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Junichi KOEZUKA , Shinji OHNO , Yuichi SATO , Masahiro TAKAHASHI , Hideyuki KISHIDA
IPC: H01L29/786 , H01L29/04 , H01L27/12
CPC classification number: H01L29/7869 , H01L27/1225 , H01L29/045 , H01L29/66969 , H01L29/78693 , H01L29/78696
Abstract: The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.
Abstract translation: 半导体器件包括具有第一区域和一对第二区域的氧化物半导体膜,第一区域和第二区域彼此面对,其间设置有第一区域,氧化物半导体膜上的栅极绝缘膜和与第一区域重叠的第一电极, 栅极绝缘膜。 第一区域是包括c轴取向晶体部分的非单晶氧化物半导体区域。 所述一对第二区域是含有掺杂剂且包含多个晶体部分的氧化物半导体区域。
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公开(公告)号:US20150104901A1
公开(公告)日:2015-04-16
申请号:US14574964
申请日:2014-12-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Masayuki SAKAKURA , Ryosuke WATANABE , Junichiro SAKATA , Kengo AKIMOTO , Akiharu MIYANAGA , Takuya HIROHASHI , Hideyuki KISHIDA
IPC: H01L29/786 , H01L21/263 , H01L29/66
CPC classification number: H01L29/78696 , H01L21/2636 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/12 , H01L29/24 , H01L29/41733 , H01L29/66969 , H01L29/7869
Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
Abstract translation: 本发明的目的是提供具有良好电气特性的高度可靠的半导体器件以及包括半导体器件作为开关元件的显示器件。 在包括氧化物半导体层的晶体管中,设置在氧化物半导体层的至少一个表面侧上的针状晶体在垂直于该表面的c轴方向上生长,并且包括平行于该表面的ab平面,以及除了 针状晶体组是无定形区域或非晶态和微晶体混合的区域。 因此,可以形成具有良好电特性的高可靠性半导体器件。
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公开(公告)号:US20130299827A1
公开(公告)日:2013-11-14
申请号:US13947334
申请日:2013-07-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Masayuki SAKAKURA , Ryosuke WATANABE , Junichiro SAKATA , Kengo AKIMOTO , Akiharu MIYANAGA , Takuya HIROHASHI , Hideyuki KISHIDA
IPC: H01L29/786 , H01L29/12
CPC classification number: H01L29/78696 , H01L21/2636 , H01L27/1225 , H01L29/04 , H01L29/045 , H01L29/12 , H01L29/24 , H01L29/41733 , H01L29/66969 , H01L29/7869
Abstract: It is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
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9.
公开(公告)号:US20230420568A1
公开(公告)日:2023-12-28
申请号:US18243688
申请日:2023-09-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Masahiro WATANABE , Mitsuo MASHIYAMA , Kenichi OKAZAKI , Motoki NAKASHIMA , Hideyuki KISHIDA
IPC: H01L29/786 , H01L21/02 , H01L29/66 , H01L27/12 , H01L21/8234
CPC classification number: H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L29/78603 , H01L29/78606 , H01L29/78618 , H01L29/66969 , H01L27/1229 , H01L27/1225 , H01L27/1233 , H01L21/823412 , H01L21/82345 , H01L21/823475 , H01L29/78672 , H01L21/02631
Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.
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公开(公告)号:US20230050036A1
公开(公告)日:2023-02-16
申请号:US17967001
申请日:2022-10-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Masahiro WATANABE , Mitsuo MASHIYAMA , Kenichi OKAZAKI , Motoki NAKASHIMA , Hideyuki KISHIDA
IPC: H01L29/786 , H01L21/02 , H01L29/66
Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.
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