公开(公告)号：US20060104113A1

公开(公告)日：2006-05-18

申请号：US11271300

申请日：2005-11-10

Applicant: Wen-Yi Hsieh ,  Ken-Hui Chen ,  Chun-Hsiung Hung ,  Han-Sung Chen ,  Nai-Ping Kuo ,  Ching-Chung Lin ,  Chuan-Ying Yu

Inventor： Wen-Yi Hsieh ,  Ken-Hui Chen ,  Chun-Hsiung Hung ,  Han-Sung Chen ,  Nai-Ping Kuo ,  Ching-Chung Lin ,  Chuan-Ying Yu

IPC: G11C16/06

CPC classification number: G11C16/28 ,  G11C16/04 ,  G11C16/0475 ,  G11C29/028 ,  G11C29/24 ,  G11C29/50004 ,  G11C2211/5634

Abstract: A memory device is disclosed that includes a plurality of word lines and a plurality of memory cells operating in one of a plurality of modes and coupled to at least one of the word lines. The memory device also includes a plurality of reference lines and reference cells. Each reference cell corresponds to one of the operating modes, supplies a reference current for the corresponding mode, and is coupled to at least one of the reference lines. A reference cell current from a reference cell can also be compared to a target range and, if outside the target range, the voltage level on a corresponding referece line can be adjusted accordingly such that the reference current falls within the target range (i.e., reference current trimming).

Abstract translation: 公开了一种存储器件，其包括多个字线和以多个模式之一工作并耦合到至少一个字线的多个存储单元。 存储装置还包括多个参考线和参考单元。 每个参考单元对应于一个操作模式，为相应模式提供参考电流，并耦合到至少一个参考线。 来自参考单元的参考单元电流也可以与目标范围进行比较，并且如果在目标范围之外，可以相应地调整相应参考线上的电压电平，使得参考电流落在目标范围内（即，参考 当前修剪）。

公开(公告)号：US20060049263A1

公开(公告)日：2006-03-09

申请号：US10928164

申请日：2004-08-30

Applicant: Chi-Yuan Ou ,  Lee-Chung Lin

Inventor： Chi-Yuan Ou ,  Lee-Chung Lin

IPC: G06K19/06

CPC classification number: G06K19/07703 ,  G06K19/07 ,  G06K19/0701 ,  G06K19/0723

Abstract: An “IC card with display panel but without batteries” includes a contact/contactless communication interface (23), a microprocessor (24), an EEPROM (28), a rectifier/voltage regulator (27), a display driver (25), and a charge-pump (26) disposed therein, and a display panel (21) disposed thereon. The microprocessor (24), receives the external data, and displays them on the display panel (21) for the users to look up the external data. The display panel (21) is the one with double steady-state function having the characteristic that once the data are displayed, no persistent power supply for the display panel (21) is needed, thus the displayed data will be preserved persistently until the next time when data are updated. In this way, the users can exempt using batteries that can avoid being disturbed by the service life of the batteries.

Abstract translation: 具有显示面板但不含电池的IC卡包括接触/非接触通信接口（23），微处理器（24），EEPROM（28），整流器/电压调节器（27），显示驱动器（25） 和设置在其中的电荷泵（26）和设置在其上的显示面板（21）。

公开(公告)号：US07010484B2

公开(公告)日：2006-03-07

申请号：US10012483

申请日：2001-12-12

Applicant: Yi-Chung Lin

Inventor： Yi-Chung Lin

IPC: G10L15/08 ,  G10L15/12 ,  G10L15/04

CPC classification number: G10L15/08

Abstract: A method of phrase verification to verify a phrase not only according to its confidence measures but also according to neighboring concepts and their confidence tags. First, an utterance is received, and the received utterance is parsed to find a concept sequence. Subsequently, a plurality of tag sequences corresponding to the concept sequence is produced. Then, a first score of each of the tag sequences is calculated. Finally, the tag sequence of the highest first score is selected as the most probable tag sequence, and the tags contained therein are selected as the most probable confidence tags, respectively corresponding to the concepts in the concept sequence.

公开(公告)号：US06921694B2

公开(公告)日：2005-07-26

申请号：US10442308

申请日：2003-05-19

Applicant: Ying-Cheng Chuang ,  Chung-Lin Huang ,  Chi-Hui Lin

Inventor： Ying-Cheng Chuang ,  Chung-Lin Huang ,  Chi-Hui Lin

IPC: H01L21/28 ,  H01L29/423 ,  H01L21/336

CPC classification number: H01L29/42324 ,  H01L21/28273

Abstract: A method for fabricating a floating gate with multiple tips. A semiconductor substrate is provided, on which an insulating layer and a patterned hard mask layer are sequentially formed. The patterned hard mask layer has an opening to expose the surface of the semiconductor substrate. A conducting layer is conformally formed on the patterned hard mask layer, and the opening is filled with the conducting layer. The conducting layer is planarized to expose the surface of the patterned hard mask layer. The conducting layer is thermally oxidized to form an oxide layer, and the patterned hard mask layer is removed.

Abstract translation: 一种用于制造具有多个尖端的浮动栅极的方法。 提供半导体衬底，其上依次形成绝缘层和图案化的硬掩模层。 图案化的硬掩模层具有露出半导体衬底的表面的开口。 在图案化的硬掩模层上共形形成导电层，并且该开口填充有导电层。 导电层被平坦化以暴露图案化的硬掩模层的表面。 导电层被热氧化以形成氧化物层，去除图案化的硬掩模层。

公开(公告)号：US06920420B2

公开(公告)日：2005-07-19

申请号：US09790947

申请日：2001-02-22

Applicant: Yi-Chung Lin

Inventor： Yi-Chung Lin

IPC: G10L15/18 ,  G06F17/20

CPC classification number: G10L15/1822

Abstract: A method of probabilistic error-tolerant natural language understanding. The process of language understanding is divided into a concept parse and a concept sequence comparison steps. The concept parse uses a parse driven by a concept grammar to construct a concept parse forest set by parsing results of speech recognition. The concept sequence comparison uses an error-tolerant interpreter to compare the hypothetical concept sequences included by the concept parse forest set and the exemplary concept sequences included in the database of the system. A most possible concept sequence is found and converted into a semantic framed that expresses the intention of the user. The whole process is led by a probability oriented scoring function. When error occurs in the speech recognition and a correct concept sequence cannot be formed, the position of the error is determined and the error is recovered according to the scoring function to reduce the negative effect.

Abstract translation: 一种概率容错自然语言理解的方法。 语言理解的过程分为概念分析和概念序列比较步骤。 概念解析使用由概念语法驱动的解析，通过解析语音识别结果来构建概念解析林集。 概念序列比较使用容错解释器来比较概念解析森林集合包括的假设概念序列和包括在系统数据库中的示例性概念序列。 找到最可能的概念序列并将其转换为表示用户意图的语义框架。 整个过程由面向概率的评分函数引导。 当语音识别发生错误时，无法形成正确的概念序列，确定错误的位置，并根据评分函数恢复错误，以减少负面影响。

公开(公告)号：US06904115B2

公开(公告)日：2005-06-07

申请号：US10842794

申请日：2004-05-10

Applicant: Yen-Chung Lin

Inventor： Yen-Chung Lin

IPC: G06M3/00 ,  G09G3/20 ,  G09G3/32

CPC classification number: G09G3/3283 ,  G09G2320/0233 ,  G09G2320/0252

Abstract: A current register unit. A first transistor of a first type, second to sixth transistors of a second type, and first and second capacitors are provided, and an image current signal is stored in the current register unit when a control signal is at a first logic level, and the image current signal is output by the current register unit when the control signal is at a second logic level. An image display device that utilizes the current register unit is also disclosed.

Abstract translation: 一个当前寄存器单元。 提供第一类型的第一晶体管，第二类型的第二至第六晶体管以及第一和第二电容器，并且当控制信号处于第一逻辑电平时，图像电流信号被存储在当前寄存器单元中，并且 当控制信号处于第二逻辑电平时，图像电流信号由当前寄存器单元输出。 还公开了利用电流寄存器单元的图像显示装置。

公开(公告)号：US20050075835A1

公开(公告)日：2005-04-07

申请号：US10935377

申请日：2004-09-07

Applicant: Ta-Feng Tseng ,  Lee-Chung Lin

Inventor： Ta-Feng Tseng ,  Lee-Chung Lin

IPC: G05B19/418 ,  G06F15/00 ,  G06F17/18

CPC classification number: G05B19/41875 ,  G05B2219/32191 ,  G05B2219/45031 ,  Y02P90/14 ,  Y02P90/22

Abstract: A method and system of real-time statistical bin control. First, a statistical bin control rule is generated by a statistical bin control rule generator, and a test result having an error frequency is then retrieved from test equipment. If the error frequency exceeds a preset limit, the system replies to the test equipment with a first action corresponding to the statistical bin control rule. Next, if the error frequency of the test results exceeds another limit, the system then replies to the test equipment with a second action corresponding to the statistical bin control rule.

Abstract translation: 实时统计箱控制的方法和系统。 首先，统计箱控制规则由统计箱控制规则生成器生成，然后从测试设备中检索具有错误频率的测试结果。 如果错误频率超过预设限制，则系统以对应于统计箱控制规则的第一个动作回复测试设备。 接下来，如果测试结果的错误频率超过另一限制，则系统以对应于统计箱控制规则的第二动作来回复测试设备。

公开(公告)号：US06875743B1

公开(公告)日：2005-04-05

申请号：US09724139

申请日：2000-11-28

Applicant: Ko-Chung Lin ,  Steven P. Adams ,  Alfredo C. Castro ,  Craig N. Zimmerman ,  Julio Hernan Cuervo ,  Wen-Cherng Lee ,  Charles E. Hammond ,  Mary Beth Carter ,  Ronald G. Almquist

Inventor： Ko-Chung Lin ,  Steven P. Adams ,  Alfredo C. Castro ,  Craig N. Zimmerman ,  Julio Hernan Cuervo ,  Wen-Cherng Lee ,  Charles E. Hammond ,  Mary Beth Carter ,  Ronald G. Almquist

IPC: A61K38/00 ,  A61K38/03 ,  A61K38/04 ,  C07K5/00

CPC classification number: A61K38/04 ,  A61K38/03

Abstract: The present invention relates to novel compounds that are useful for inhibition and prevention of cell adhesion and cell adhesion-mediated pathologies. This invention also relates to pharmaceutical formulations comprising these compounds and methods of using them for inhibition and prevention of cell adhesion and cell adhesion-mediated pathologies. The compounds and pharmaceutical compositions of this invention can be used as therapeutic or prophylactic agents. They are particularly well-suited for treatment of many inflammatory and autoimmune diseases.

公开(公告)号：US06768164B2

公开(公告)日：2004-07-27

申请号：US10725052

申请日：2003-12-01

Applicant: Chi-Hui Lin ,  Chung-Lin Huang

Inventor： Chi-Hui Lin ,  Chung-Lin Huang

IPC: H01L29788

CPC classification number: H01L27/11521 ,  H01L27/115 ,  H01L29/42336 ,  H01L29/66825 ,  H01L29/7883

Abstract: A stacked gate flash memory device and method of fabricating the same. A cell of the stacked gate flash memory device in accordance with the invention is disposed in a cell trench within a substrate and source and drain regions are formed in the same substrate side of the adjacent isolation trenches. Thus, the stacked gate flash memory device of the invention can achieve high integration of memory cells.

公开(公告)号：US06764866B1

公开(公告)日：2004-07-20

申请号：US10370825

申请日：2003-02-21

Applicant: Lee-Chung Lin ,  Jun-Hao Huang ,  Chun-Chieh Hsiao

Inventor： Lee-Chung Lin ,  Jun-Hao Huang ,  Chun-Chieh Hsiao

IPC: H01L2166

CPC classification number: G01R35/00 ,  G01R31/2886

Abstract: Each of a system for qualifying a multiple die under test head and a system for qualifying the multiple die under test head employ selection of a sub-set of die arrays within a calibration standard substrate. The sub-set of die arrays is selected such as to: (1) not overlap in position within the calibration standard substrate; and (2) have in an aggregate no greater than one defective die within each of a series of die locations. The system and the method provide for accurate and efficient qualification of the multiple die under test head and thus accurate and efficient electrical test measurement of a microelectronic product.

Abstract translation: 用于限定测试头下的多个模具的系统和用于限定测试头下的多个模具的系统的每个都使用在校准标准衬底内选择一组模具阵列。 选择模具阵列的子集，例如：（1）在校准标准衬底内的位置不重叠; 和（2）在一系列模具位置的每一个内具有不大于一个有缺陷的模具的总计。 该系统和方法提供准确高效的多管芯测试头的鉴定，从而准确高效地对微电子产品进行电测试。