Innovative interconnect design for package architecture to improve latency

    公开(公告)号:US12266625B2

    公开(公告)日:2025-04-01

    申请号:US18599147

    申请日:2024-03-07

    Abstract: An integrated circuit includes a package substrate that includes first and second electrical traces. The integrated circuit includes first, second, third, and fourth configurable dies, which are mounted on the package substrate. The first and second configurable dies are arranged in a first row. The third and fourth configurable dies are arranged in a second row, which is approximately parallel to the first row. The first and third configurable dies are arranged in a first column. The second and fourth configurable dies are arranged in a second column, which is approximately parallel to the first column. The first electrical trace couples the first and third configurable dies, and the second electrical trace couples the second and third configurable dies. The second electrical trace is oblique with respect to the first electrical trace. The oblique trace improves the latency of signals transmitted between dies and thereby increases the circuit operating speed.

    Divided quad clock-based inter-die clocking in a three-dimensional stacked memory device

    公开(公告)号:US12261613B2

    公开(公告)日:2025-03-25

    申请号:US18607999

    申请日:2024-03-18

    Abstract: A memory device includes a clock input configured to receive a clock from a host device. The memory device also includes a command input configured to receive command and address bits from the host device. The memory device further includes multiple die stacked in a three-dimensional stack. A first die of the plurality of die includes a first plurality of memory cells and first local control circuitry. The first local circuitry includes division circuitry configured to receive the clock from the clock input, generate a divided clock having a lower frequency than that of the clock, and generate multiple clocks from the divided clock with each of the multiple clocks having a lower frequency than the divided clock. The memory device also includes one or more transmitters configured to transmit the multiple clocks using inter-die interconnects between the multiple die.

    Linearized-trajectory predictive control for microgrid stability

    公开(公告)号:US12255462B2

    公开(公告)日:2025-03-18

    申请号:US17575702

    申请日:2022-01-14

    Abstract: Techniques and apparatus presented herein are directed to improvements in maintaining voltage and frequency stability of an electric power delivery system. To do so, model predictive control (MPC) may be used. Input data may be obtained for a sampling period and may include a current system state. The MPC may predict an initial trajectory of the input data, output data, and a state of the system for a prediction period. The MPC may linearize the output and state trajectories and determine an updated input trajectory based at least in part on the linearized output trajectory. The MPC may determine control inputs to the system which achieve the updated input trajectory for a control period. The MPC may transmit control signals based at least in part on the control inputs to equipment associated with the input data.

    Inlet duct system for a heat recovery steam generator

    公开(公告)号:US12253004B1

    公开(公告)日:2025-03-18

    申请号:US18590849

    申请日:2024-02-28

    Abstract: A system includes an exhaust diffuser system for a heat recovery steam generator (HRSG). The system includes an inlet portion, a diffuser portion axially extending from the inlet portion, and an outlet portion fluidly coupled to an axial distal end of the diffuser portion, wherein an outlet extent of the outlet portion is greater than an inlet extent of the inlet portion. The diffuser portion includes a plurality of wall portions, and the plurality of wall portions is incrementally angled relative to an axial extent extending from the inlet portion to the outlet portion. The system may further include a gas turbine engine coupled to the inlet portion and the HRSG.

    Debug trace microsectors
    16.
    发明授权

    公开(公告)号:US12248021B2

    公开(公告)日:2025-03-11

    申请号:US17132683

    申请日:2020-12-23

    Abstract: Systems and methods described herein may relate to data transactions involving a microsector architecture. Control circuitry may organize transactions to and from the microsector architecture to, for example, enable direct addressing transactions as well as batch transactions across multiple microsectors. A data path disposed between programmable logic circuitry of a column of microsectors and a column of row controllers may form a micro-network-on-chip used by a network-on-chip to interface with the programmable logic circuitry.

    Canopy coverage determination for improved wireless connectivity

    公开(公告)号:US12245050B2

    公开(公告)日:2025-03-04

    申请号:US17716765

    申请日:2022-04-08

    Applicant: Apple Inc.

    Abstract: The embodiments disclosed herein include capturing images via cameras or light sensors of a mobile communication device, processing the image to determine obstructed (e.g., by foliage) portions and unobstructed (e.g., open sky) portions of the images, and generating a grid indicating the obstructed and unobstructed portions. The device may then adjust operating characteristics, such as synchronizing with a communication hub or other mobile communication device, performing a handover with the communication hub or other mobile communication device, determining transmission power or an amount to increase transmission power, selecting an antenna, determining a beam direction, determining a discontinuous reception cycle or a frequency for receiving data, providing an indication to stop or proceed through certain areas (e.g., to take advantage of areas with higher signal quality or avoid areas with lower signal quality), and the like, based on the obstructed and unobstructed portions identified in the grid.

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