公开(公告)号：US07427968B2

公开(公告)日：2008-09-23

申请号：US11448310

申请日：2006-06-07

申请人： Yat To Chan ,  Chien Te Chen

发明人： Yat To Chan ,  Chien Te Chen

IPC分类号： H01Q3/02 ,  H01Q1/32 ,  H01Q1/12

CPC分类号： H01Q1/084

摘要： An antenna device includes an antenna housing having a chamber and a slot formed in one end and formed between two arms and communicating with the chamber, an antenna member having a stud engaged into the slot and rotatably coupled to the antenna housing with a pivot axle and having two or more flat surfaces formed in the stud. A spring-biased follower is slidably received in the antenna housing and includes an actuator for engaging with either of the flat surfaces of the antenna member and for anchoring and retaining the antenna member to the antenna housing at selected angular positions. The antenna device includes a greatly simplified structure with a greatly reduced expense.

摘要翻译： 一种天线装置包括：天线壳体，其具有一个腔室，一个槽形成在两个臂之间并且与该腔室连通;天线构件，其具有接合到所述槽中的螺柱，并且可转动地连接到具有枢轴的天线壳体; 具有形成在螺柱中的两个或多个平坦表面。 弹簧偏置的从动件可滑动地容纳在天线壳体中，并且包括用于与天线构件的任一个平坦表面接合的致动器，并且用于在选定的角度位置锚定和保持天线构件到天线壳体。 天线装置包括大大简化的结构，大大降低了费用。

公开(公告)号：US20070285333A1

公开(公告)日：2007-12-13

申请号：US11448310

申请日：2006-06-07

申请人： Yat To Chan ,  Chien Te Chen

发明人： Yat To Chan ,  Chien Te Chen

IPC分类号： H01Q1/12

CPC分类号： H01Q1/084

摘要： An antenna device includes an antenna housing having a chamber and a slot formed in one end and formed between two arms and communicating with the chamber, an antenna member having a stud engaged into the slot and rotatably coupled to the antenna housing with a pivot axle and having two or more flat surfaces formed in the stud. A spring-biased follower is slidably received in the antenna housing and includes an actuator for engaging with either of the flat surfaces of the antenna member and for anchoring and retaining the antenna member to the antenna housing at selected angular positions. The antenna device includes a greatly simplified structure with a greatly reduced expense.

摘要翻译： 一种天线装置包括：天线壳体，其具有一个腔室，一个槽形成在两个臂之间并且与该腔室连通;天线构件，其具有接合到所述槽中的螺柱，并且可转动地连接到具有枢轴的天线壳体; 具有形成在螺柱中的两个或多个平坦表面。 弹簧偏置的从动件可滑动地容纳在天线壳体中，并且包括用于与天线构件的任一个平坦表面接合的致动器，并且用于在选定的角度位置锚定和保持天线构件到天线壳体。 天线装置包括大大简化的结构，大大降低了费用。

公开(公告)号：US20060053985A1

公开(公告)日：2006-03-16

申请号：US10940674

申请日：2004-09-15

申请人： Chien-Te Chen

发明人： Chien-Te Chen

IPC分类号： B25G1/01

CPC分类号： B25G1/00

摘要： A handle of a hand tool includes an enclosed chamber defined therein and a shank is connected to an end of the handle. The enclosed chamber allows the handle to be floatable in water. A fluorescent layer is coated on an outer periphery of the handle such that the handle can be seen in dark.

摘要翻译： 手工具的手柄包括限定在其中的封闭室，并且柄部连接到手柄的端部。 封闭的腔室允许手柄在水中漂浮。 荧光层被涂覆在手柄的外周上，使得可以在黑暗中看到手柄。

公开(公告)号：US20050247481A1

公开(公告)日：2005-11-10

申请号：US10935870

申请日：2004-09-07

申请人： Chien-Te Chen ,  Chih-Hao Chang

发明人： Chien-Te Chen ,  Chih-Hao Chang

IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46 ,  H05K10/00

CPC分类号： H05K1/0269 ,  H05K3/0052 ,  H05K3/242 ,  H05K3/403 ,  H05K3/4602 ,  H05K2201/0919 ,  H05K2201/09781 ,  H05K2203/163 ,  H05K2203/175 ,  Y10T29/49128

摘要： A circuit board with a quality-indicator mark and a method for indicating quality of the circuit board. The circuit board includes a plurality of circuit board units. A plating bus is formed around each circuit board unit and extended to form a plating trace in an inner-layer circuit structure of each circuit board unit. The inner-layer circuit structure is inspected in quality to maintain or break connection between the plating trace and plating bus if the quality is good or not. At least one circuit structure is formed on the inner-layer circuit structure and electrically connected to the plating trace to form a conductive mark on each circuit board unit. A metal protection layer is formed on the at least one circuit structure via the plating bus, and the conductive mark with the metal protection layer indicates that the inner-layer circuit structure of the circuit board unit is good.

摘要翻译： 具有质量指示标记的电路板和用于指示电路板的质量的方法。 电路板包括多个电路板单元。 在每个电路板单元周围形成电镀母线，并延伸以在每个电路板单元的内层电路结构中形成电镀痕迹。 如果质量好，内层电路结构的质量将被检查以维持或断开电镀痕迹和电镀母线之间的连接。 在内层电路结构上形成至少一个电路结构，并电连接到电镀迹线，以在每个电路板单元上形成导电标记。 金属保护层通过电镀母线形成在至少一个电路结构上，金属保护层的导电标记表示电路板单元的内层电路结构良好。

公开(公告)号：USD687692S1

公开(公告)日：2013-08-13

申请号：US29436779

申请日：2012-11-09

申请人： Chien-Te Chen

设计人： Chien-Te Chen

公开(公告)号：US08161635B1

公开(公告)日：2012-04-24

申请号：US12026429

申请日：2008-02-05

申请人： Chien Te Chen

发明人： Chien Te Chen

IPC分类号： H01K3/10

CPC分类号： H05K1/113 ,  H05K3/427 ,  H05K2201/0347 ,  H05K2201/0959 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

摘要： Novel methods are provided that results in the formation of single-cap VIPs in a substrate are described herein. As a result, fine pitch trace patterns may be formed on the substrate. The methods may include initially providing a substrate having a first and a second side, the first side being opposite of the second side. A via may then be constructed in the substrate, the via being formed within a via hole that extends from the first side to the second side of the substrate, the formed via having a first end located at the first side of the substrate, and a second end opposite the first end located at the second side of the substrate. A selective deposition may be performed of a conductive material on the second end of the via to form a conductive pad directly on the via on the second side of the substrate without depositing the conductive material onto the first side of the substrate.

摘要翻译： 本文描述了导致在底物中形成单帽VIP的新方法。 结果，可以在基板上形成精细的间距迹线图案。 所述方法可以包括最初提供具有第一和第二侧的衬底，第一侧与第二侧相对。 然后可以在衬底中构造通孔，所述通孔形成在从衬底的第一侧延伸到第二侧的通孔中，所形成的通孔具有位于衬底的第一侧的第一端，以及 第二端相对于位于基板的第二侧的第一端。 可以在通孔的第二端上执行导电材料的选择性沉积，以在衬底的第二侧上的通孔上直接形成导电焊盘，而不将导电材料沉积到衬底的第一侧上。

公开(公告)号：US07141868B2

公开(公告)日：2006-11-28

申请号：US11059143

申请日：2005-02-15

申请人： Yu-Lin Liao ,  Chien-Te Chen

发明人： Yu-Lin Liao ,  Chien-Te Chen

IPC分类号： H01L23/495

CPC分类号： H05K3/242 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49894 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/181 ,  H05K3/0052 ,  H05K3/28 ,  H05K3/284 ,  H05K2201/09781 ,  H05K2201/0989 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00012

摘要： A flash preventing substrate and a method for fabricating the same are proposed. A core defined with a plurality of substrate units is prepared. A circuit patterning process is performed to form circuit structures on the core corresponding to the substrate units, plating buses between the adjacent substrate units and electrically connected to the circuit structures, and a molding ring surrounding all the substrate units. The molding ring is located at a position predetermined for contacting the substrate with a mold. A solder mask layer covers the circuit structures, the plating buses and the molding ring, and is formed with a plurality of openings therein, such that predetermined portions of the circuit structures are exposed via the openings and serve as electrical input/output connections. During a molding process, the mold can tightly abut against the solder mask layer covering the molding ring to prevent outward flashes of an encapsulating material.

摘要翻译： 提出防闪光基板及其制造方法。 制备由多个基板单元限定的芯。 进行电路图案化处理，以在与基板单元相对应的芯上形成电路结构，在相邻的基板单元之间电镀总线并电连接到电路结构，以及围绕所有基板单元的模制环。 模制环位于预定的用于使基板与模具接触的位置。 焊接掩模层覆盖电路结构，电镀母线和成型环，并且在其中形成有多个开口，使得电路结构的预定部分经由开口暴露并用作电输入/输出连接。 在模制过程中，模具可以紧密地抵靠覆盖模制环的焊接掩模层，以防止封装材料向外闪烁。

公开(公告)号：US07119565B2

公开(公告)日：2006-10-10

申请号：US10728304

申请日：2003-12-03

申请人： Chien-Te Chen ,  Chien-Ping Huang

发明人： Chien-Te Chen ,  Chien-Ping Huang

IPC分类号： G01R31/02

CPC分类号： H05K1/0268 ,  H05K3/222 ,  H05K3/3452 ,  H05K7/1053 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611

摘要： A chip carrier for testing electrical performance of a passive component includes: a core layer having a plurality of conductive traces on a surface thereof; at least one first trace connected with the passive component and having a first predetermined position and two ends, wherein the two ends are respectively electrically connected to a first bond finger on the surface of the chip carrier and to a first ball pad on an opposite surface of the chip carrier; at least one second trace not connected with the passive component and having two ends and a second predetermined position located on the same surface as the first predetermined position, one end of the second trace being electrically connected to a second ball pad located on the same surface as the first ball pad; and a solder mask layer applied over the conductive traces, with the first and second predetermined positions exposed.

摘要翻译： 用于测试无源部件的电性能的芯片载体包括：在其表面上具有多个导电迹线的芯层; 至少一个第一迹线与无源部件连接并且具有第一预定位置和两端，其中两端分别电连接到芯片载体表面上的第一接合指状物和相对表面上的第一球垫 的芯片载体; 至少一个第二迹线不与无源部件连接并且具有位于与第一预定位置相同的表面上的两端和第二预定位置，第二迹线的一端电连接到位于同一表面上的第二球垫 作为第一个球垫; 以及施加在导电迹线上的焊接掩模层，其中暴露第一和第二预定位置。

公开(公告)号：US20060076695A1

公开(公告)日：2006-04-13

申请号：US11234652

申请日：2005-09-23

申请人： Wen-Chen Hsieh ,  Hsiu-Fang Chien ,  Chien-Te Chen

发明人： Wen-Chen Hsieh ,  Hsiu-Fang Chien ,  Chien-Te Chen

IPC分类号： H01L23/28

CPC分类号： H01L23/3121 ,  H01L21/565 ,  H01L21/566 ,  H01L2224/16 ,  H01L2224/83104 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2224/0401

摘要： A semiconductor package with flash-absorbing mechanism and a fabrication method thereof are proposed, wherein a flash-absorbing structure is formed on a gold-plated copper layer of a substrate, and adhesion between the flash-absorbing structure and a molding material is larger than that between the molding material and a mold, such that flashes of the molding material are not adhered to the mold after completing a molding process unlike the conventional technology, thereby ensuring quality of the fabricated semiconductor package.

摘要翻译： 提出了一种具有闪光吸收机构的半导体封装及其制造方法，其中在衬底的镀金铜层上形成闪光吸收结构，并且闪光吸收结构与成型材料之间的粘合力大于 在模制材料和模具之间，使得成型材料的闪光在完成模制工艺之后不会像传统技术那样粘附到模具上，从而确保制造的半导体封装的质量。

公开(公告)号：US20060060958A1

公开(公告)日：2006-03-23

申请号：US11222386

申请日：2005-09-07

申请人： Chien-Te Chen ,  Wen-Hsin Wang

发明人： Chien-Te Chen ,  Wen-Hsin Wang

IPC分类号： H01L23/48

CPC分类号： H05K1/114 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/181 ,  H05K1/113 ,  H05K3/3452 ,  H05K2201/0959 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package, and a fabrication method and a carrier thereof are provided. The fabrication method includes: preparing a core layer having a first surface and an opposed second surface, wherein the first and second surfaces are electrically connected to each other by a plurality of conductive vias; forming a plurality of bond pads on the second surface, wherein the bond pads are electrically connected to the conductive vias, and each of the conductive vias is partly located within a boundary of a corresponding one of the bond pads and is partly located out of the boundary of the corresponding bond pad, such that the carrier is fabricated; mounting and electrically connecting a chip to the first surface; forming an encapsulant on the first surface to encapsulate the chip; and forming solder joints on the bond pads of the second surface. By this arrangement, a popcorn effect is avoided.

摘要翻译： 提供半导体封装及其制造方法和载体。 制造方法包括：制备具有第一表面和相对的第二表面的芯层，其中第一表面和第二表面通过多个导电通孔彼此电连接; 在所述第二表面上形成多个接合焊盘，其中所述接合焊盘电连接到所述导电通孔，并且每个所述导电通孔部分地位于所述接合焊盘的对应的一个接合焊盘的边界内，并且部分地位于 边界，使得制造载体; 将芯片安装并电连接到第一表面; 在所述第一表面上形成密封剂以封装所述芯片; 以及在第二表面的接合焊盘上形成焊点。 通过这种安排，可以避免爆米花效应。