公开(公告)号：US07180111B1

公开(公告)日：2007-02-20

申请号：US10752845

申请日：2004-01-07

Applicant: Clifford I. Drowley ,  Ching-Chun Wang ,  Jungwook Yang

Inventor： Clifford I. Drowley ,  Ching-Chun Wang ,  Jungwook Yang

IPC: H01L31/113

CPC classification number: H01L27/14603

Abstract: A photodiode sensor structure includes a first dopant type substrate with a first surface and a second dopant type well region with a second surface. The second dopant type well region is formed in the first dopant type substrate such that the first surface and the second surface are substantially co-planar to form a diode surface. An interface between the second dopant type well region and the first dopant type substrate at the diode surface forms a diode junction. A poly silicon region is formed along the periphery of the entire diode junction. The poly silicon region provides the p-n junction of the photodiode with a physical shield to prevent any process damage from being introduced after the poly silicon processing (including damages from processes such as dielectric deposition/pattern, metal deposition/pattern, and/or via/contact hole etching), thereby reducing leakage current. The poly silicon region can also provide the p-n junction of the photodiode with an electrical shield to prevent any possible trapped charges at higher levels of dielectric above the junctions to affect the surface potential and/or prevent the formation of conducting channels between the p-n regions, thereby reducing leakage current.

Abstract translation: 光电二极管传感器结构包括具有第一表面的第一掺杂剂型衬底和具有第二表面的第二掺杂剂型阱区。 第二掺杂剂型阱区形成在第一掺杂剂型衬底中，使得第一表面和第二表面基本上共面以形成二极管表面。 在二极管表面处的第二掺杂剂型阱区和第一掺杂剂型衬底之间的界面形成二极管结。 沿着整个二极管结的周边形成多晶硅区域。 多晶硅区域提供光电二极管的pn结与物理屏蔽，以防止在多晶硅处理之后引入任何工艺损坏（包括诸如介电沉积/图案，金属沉积/图案和/或通孔/ 接触孔蚀刻），从而减少漏电流。 多晶硅区域还可以提供光电二极管的pn结与电屏蔽，以防止在结点之上的较高电介质层处的任何可能的俘获电荷影响表面电势和/或防止在pn区域之间形成导电通道， 从而减少漏电流。

公开(公告)号：US07173299B1

公开(公告)日：2007-02-06

申请号：US11350296

申请日：2006-02-07

Applicant: Clifford I. Drowley ,  Ching-Chun Wang ,  Jungwook Yang

Inventor： Clifford I. Drowley ,  Ching-Chun Wang ,  Jungwook Yang

IPC: H01L31/062 ,  H01L31/113

CPC classification number: H01L27/14643 ,  H01L27/14603

Abstract: A semiconductor imager structure having a photodiode being provided as a well region formed within a substrate layer and a transistor electrically connected to the photodiode and having a terminal that has a same electrical potential as the photodiode. The well region of the photodiode having an extended portion so that at least a portion of the terminal of the transistor has the same electrical potential as the photodiode is formed within the extended portion of the well region of the photodiode.

Abstract translation: 提供具有光电二极管作为形成在衬底层内的阱区的半导体成像器结构和与该光电二极管电连接且具有与该光电二极管具有相同电位的端子的晶体管。 光电二极管的阱区具有延伸部分，使得晶体管的端子的至少一部分具有与光电二极管的阱区域的延伸部分内的光电二极管相同的电位。

公开(公告)号：US06707080B2

公开(公告)日：2004-03-16

申请号：US10320296

申请日：2002-12-16

Applicant: Ching-Chun Wang ,  Dun-Nian Yaung ,  Chien-Hsien Tseng ,  Shou-Gwo Wuu

Inventor： Ching-Chun Wang ,  Dun-Nian Yaung ,  Chien-Hsien Tseng ,  Shou-Gwo Wuu

IPC: H01L31062

CPC classification number: H01L27/14645

Abstract: A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.

Abstract translation: 实现了对CMOS彩色成像器上的红色，绿色和蓝色像素单元制造具有更均匀的光谱响应的光电二极管阵列的方法。 在衬底上形成场氧化物以电隔离CMOS电路的器件区域后，形成用于长波长红色像素单元的光电二极管的深N掺杂阱的阵列。 与N个掺杂的阱相邻并且与其交错形成P掺杂阱区的阵列。 在较短波长的绿色和蓝色像素单元的P掺杂阱内形成浅扩散的N +区。 浅扩散光电二极管提高了量子效率（QE），并提供了具有改进的色彩保真度的彩色成像仪。 在光电二极管上沉积并图案化绝缘层和适当的染料材料以提供彩色像素单元阵列。 N和P掺杂阱也用于支持FET CMOS电路以提供成本有效的制造工艺。

公开(公告)号：US06518085B1

公开(公告)日：2003-02-11

申请号：US09635584

申请日：2000-08-09

Applicant: Ching-Chun Wang ,  Dun-Nian Yaung ,  Chien-Hsien Tseng ,  Shou-Gwo Wuu

Inventor： Ching-Chun Wang ,  Dun-Nian Yaung ,  Chien-Hsien Tseng ,  Shou-Gwo Wuu

IPC: H01L2100

CPC classification number: H01L27/14645

Abstract: A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.

Abstract translation: 实现了对CMOS彩色成像器上的红色，绿色和蓝色像素单元制造具有更均匀的光谱响应的光电二极管阵列的方法。 在衬底上形成场氧化物以电隔离CMOS电路的器件区域后，形成用于长波长红色像素单元的光电二极管的深N掺杂阱的阵列。 与N个掺杂的阱相邻并且与其交错形成P掺杂阱区的阵列。 在较短波长的绿色和蓝色像素单元的P掺杂阱内形成浅扩散的N +区。 浅扩散光电二极管提高了量子效率（QE），并提供了具有改进的色彩保真度的彩色成像仪。 在光电二极管上沉积并图案化绝缘层和适当的染料材料以提供彩色像素单元阵列。 N和P掺杂阱也用于支持FET CMOS电路以提供成本有效的制造工艺。

公开(公告)号：US09059057B2

公开(公告)日：2015-06-16

申请号：US13492258

申请日：2012-06-08

Applicant: Chun-Han Tsao ,  Chih-Yu Lai ,  Chih-Hui Huang ,  Cheng-Ta Wu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Shyh-Fann Ting ,  Chia-Shiung Tsai

Inventor： Chun-Han Tsao ,  Chih-Yu Lai ,  Chih-Hui Huang ,  Cheng-Ta Wu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Shyh-Fann Ting ,  Chia-Shiung Tsai

IPC: H01L31/102 ,  H01L21/00 ,  H01L27/146 ,  H01L27/148

CPC classification number: H01L31/02164 ,  H01L27/14623 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/148 ,  H01L51/4273

Abstract: An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer.

Abstract translation: 一种包括具有阵列区域和黑色电平校正区域的半导体衬底的图像传感器装置。 阵列区域包含多个辐射敏感像素。 黑色电平校正区域包含一个或多个参考像素。 基板具有前侧和后侧。 图像传感器装置包括形成在基板的背面上的第一压缩应力层。 第一压应力层含有氧化硅，带负电荷。 第二压应力层含有氮化硅，带负电荷。 在黑色电平校正区域的至少一部分上形成金属屏蔽。 图像传感器装置包括形成在金属屏蔽和第二压缩应力层上的第三压缩应力层。 第三压缩应力层含有氧化硅。 金属屏蔽层的侧壁由第三压应力层保护。

公开(公告)号：US08802457B2

公开(公告)日：2014-08-12

申请号：US13205179

申请日：2011-08-08

Applicant: Chih-Yu Lai ,  Cheng-Ta Wu ,  Kai-Chun Hsu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Chia-Shiung Tsai

Inventor： Chih-Yu Lai ,  Cheng-Ta Wu ,  Kai-Chun Hsu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Chia-Shiung Tsai

IPC: H01L21/00 ,  H01L21/46 ,  H01L21/322

CPC classification number: H01L27/14687 ,  H01L27/1464

Abstract: A method includes performing a grinding to a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface. A treatment is then performed on the back surface using a method selected from the group consisting essentially of a dry treatment and a plasma treatment. Process gases that are used in the treatment include oxygen (O2). The plasma treatment is performed without vertical bias in a direction perpendicular to the back surface.

Abstract translation: 一种方法包括对半导体衬底的背面进行研磨，其中半导体衬底的剩余部分具有背面。 然后使用基本上由干法处理和等离子体处理组成的组中的方法在背面进行处理。 用于处理的工艺气体包括氧（O 2）。 在垂直于后表面的方向上进行等离子体处理而没有垂直偏压。

公开(公告)号：US08686533B2

公开(公告)日：2014-04-01

申请号：US13552734

申请日：2012-07-19

Applicant: Ching-Chun Wang ,  Tzu-Hsuan Hsu

Inventor： Ching-Chun Wang ,  Tzu-Hsuan Hsu

IPC: H01L29/00

CPC classification number: H01L23/522 ,  H01L21/6836 ,  H01L21/76256 ,  H01L21/76898 ,  H01L23/53223 ,  H01L23/53238 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00

Abstract: Provided is a method of fabricating a semiconductor device that includes providing a semiconductor substrate having a front side and a back side, forming a first circuit and a second circuit at the front side of the semiconductor substrate, bonding the front side of the semiconductor substrate to a carrier substrate, thinning the semiconductor substrate from the back side, and forming an trench from the back side to the front side of the semiconductor substrate to isolate the first circuit from the second circuit.

Abstract translation: 提供一种制造半导体器件的方法，该半导体器件包括提供具有正面和背面的半导体衬底，在半导体衬底的正面形成第一电路和第二电路，将半导体衬底的正面粘合到 载体衬底，从背面减薄半导体衬底，并且从半导体衬底的背侧到前侧形成沟槽，以将第一电路与第二电路隔离。

公开(公告)号：US08324002B2

公开(公告)日：2012-12-04

申请号：US13206228

申请日：2011-08-09

Applicant: Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Ching-Chun Wang

Inventor： Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Ching-Chun Wang

IPC: H01L31/0232

CPC classification number: H01L27/14625 ,  H01L27/14603 ,  H01L27/1464

Abstract: Provided is a method of forming and/or using a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A transfer transistor and a photodetector are formed on the front surface. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. Radiation incident the back surface and tratversing the photodetector may be reflected by the optically reflective layer. The reflected radiation may be sensed by the photodetector.

Abstract translation: 提供一种形成和/或使用背面照射传感器的方法，该传感器包括具有前表面和后表面的半导体衬底。 传输晶体管和光电检测器形成在前表面上。 转移晶体管的栅极包括光反射层。 包括光反射层的传输晶体管的栅极覆盖在光电检测器上。 入射到背面的光线和扫描光电检测器的辐射可以被光反射层反射。 可以由光电检测器感测反射的辐射。

公开(公告)号：US20100207230A1

公开(公告)日：2010-08-19

申请号：US12371146

申请日：2009-02-13

Applicant: Tzu-Hsuan Hsu ,  Alex Hsu ,  Ching-Chun Wang

Inventor： Tzu-Hsuan Hsu ,  Alex Hsu ,  Ching-Chun Wang

IPC: H01L31/0352 ,  H01L21/76 ,  H01L21/66

CPC classification number: H01L27/14689 ,  H01L21/26513 ,  H01L27/1463

Abstract: Provided is a method for fabricating an image sensor device that includes providing a substrate having a front side and a back side; patterning a photoresist on the front side of the substrate to define an opening having a first width, the photoresist having a first thickness correlated to the first width; performing an implantation process through the opening using an implantation energy correlated to the first thickness thereby forming a first doped isolation feature; forming a light sensing feature adjacent to the first doped isolation feature, the light sensing feature having a second width; and thinning the substrate from the back side so that the substrate has a second thickness that does not exceed twice a depth of the first doped isolation feature. A pixel size is substantially equal to the first and second widths.

Abstract translation: 提供一种制造图像传感器装置的方法，该图像传感器装置包括提供具有正面和背面的基板; 在衬底的前侧上形成光致抗蚀剂以限定具有第一宽度的开口，光致抗蚀剂具有与第一宽度相关的第一厚度; 通过使用与第一厚度相关的注入能量通过开口执行注入工艺，从而形成第一掺杂隔离特征; 形成与所述第一掺杂隔离特征相邻的光感测特征，所述光感测特征具有第二宽度; 以及从背面使衬底变薄，使得衬底具有不超过第一掺杂隔离特征深度的两倍的第二厚度。 像素尺寸基本上等于第一和第二宽度。

公开(公告)号：US20100102411A1

公开(公告)日：2010-04-29

申请号：US12651236

申请日：2009-12-31

Applicant: Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Ching-Chun Wang

Inventor： Tzu-Hsuan Hsu ,  Dun-Nian Yaung ,  Ching-Chun Wang

IPC: H01L31/00 ,  H01L31/062

CPC classification number: H01L27/14643 ,  H01L27/14625 ,  H01L27/1464

Abstract: A backside-illuminated sensor including a semiconductor substrate. The semiconductor substrate has a front surface and a back surface. A plurality of pixels are formed on the front surface of the semiconductor substrate. At least one pixel includes a photogate structure. The photogate structure has a metal gate that includes a reflective layer.

Abstract translation: 背面照明传感器，包括半导体衬底。 半导体衬底具有前表面和后表面。 在半导体衬底的前表面上形成多个像素。 至少一个像素包括光栅结构。 光栅结构具有包括反射层的金属栅极。