公开(公告)号：US06978357B1

公开(公告)日：2005-12-20

申请号：US09122349

申请日：1998-07-24

Applicant: Lance Hacking ,  Shreekant Thakkar ,  Thomas Huff ,  Vladimir Pentkovski ,  Hsien-Cheng E. Hsieh

Inventor： Lance Hacking ,  Shreekant Thakkar ,  Thomas Huff ,  Vladimir Pentkovski ,  Hsien-Cheng E. Hsieh

IPC: G06F12/08

CPC classification number: G06F12/0891 ,  G06F12/0804

Abstract: A method and apparatus for including in a computer system, instructions for performing cache memory invalidate and cache memory flush operations. In one embodiment, the computer system comprises a cache memory having a plurality of cache lines each of which stores data, and a storage area to store a data operand. An execution unit is coupled to the storage area, and operates on data elements in the data operand to invalidate data in a predetermined portion of the plurality of cache lines in response to receiving a single instruction.

Abstract translation: 一种用于在计算机系统中包括用于执行高速缓存存储器无效的指令和高速缓存存储器刷新操作的方法和装置。 在一个实施例中，计算机系统包括具有存储数据的多个高速缓存行和存储数据操作数的存储区域的高速缓冲存储器。 执行单元耦合到存储区域，并且响应于接收到单个指令，对数据操作数中的数据元素进行操作以使多个高速缓存行的预定部分中的数据无效。

公开(公告)号：US08289850B2

公开(公告)日：2012-10-16

申请号：US13241738

申请日：2011-09-23

Applicant: Lance Hacking ,  Ramana Rachakonda ,  Belliappa Kuttanna ,  Rajesh Patel

Inventor： Lance Hacking ,  Ramana Rachakonda ,  Belliappa Kuttanna ,  Rajesh Patel

IPC: H04L12/28 ,  H04J1/16 ,  G08C15/00 ,  G06F11/00 ,  G01R31/08

CPC classification number: G06F1/3287 ,  G06F1/3203 ,  G06F1/3243 ,  G06F13/42 ,  G06F15/17306 ,  Y02D10/151 ,  Y02D10/152 ,  Y02D10/171

Abstract: An interconnect bandwidth throttler is disclosed. The interconnect bandwidth throttler turns off the interconnect, based on whether a maximum number of transactions has taken place within a predetermined throttle window. Both the maximum number of transactions and the throttle window are adjustable. Characteristics such as performance, thermal considerations, and average power are adjustable using the interconnect bandwidth throttler.

Abstract translation: 公开了一种互连带宽调节器。 基于在预定的节气门窗口内是否发生了最大数量的交易，互连带宽调节器关闭互连。 最大交易数量和油门窗口均可调。 使用互连带宽调节器可以调整性能，散热和平均功耗等特性。

公开(公告)号：US20090228736A1

公开(公告)日：2009-09-10

申请号：US12042985

申请日：2008-03-05

Applicant: Eric L. Hendrickson ,  Sanjoy Mondal ,  Larry Thatcher ,  William Hodges ,  Lance Hacking ,  Sankaran Menon

Inventor： Eric L. Hendrickson ,  Sanjoy Mondal ,  Larry Thatcher ,  William Hodges ,  Lance Hacking ,  Sankaran Menon

IPC: G06F1/04

CPC classification number: G06F1/12

Abstract: A technique to promote determinism among multiple clocking domains within a computer system or integrated circuit, In one embodiment, one or more execution units are placed in a deterministic state with respect to multiple clocks within a processor system having a number of different clocking domains.

Abstract translation: 一种用于促进计算机系统或集成电路内的多个时钟域之间的确定性的技术。在一个实施例中，一个或多个执行单元相对于具有多个不同计时域的处理器系统内的多个时钟被置于确定性状态。

公开(公告)号：US20060080461A1

公开(公告)日：2006-04-13

申请号：US10859656

申请日：2004-06-02

Applicant: Jeffrey Wilcox ,  Shivnandan Kaushik ,  Stephen Gunther ,  Devadatta Bodas ,  Siva Ramakrishnan ,  Bernard Lint ,  Lance Hacking

Inventor： Jeffrey Wilcox ,  Shivnandan Kaushik ,  Stephen Gunther ,  Devadatta Bodas ,  Siva Ramakrishnan ,  Bernard Lint ,  Lance Hacking

IPC: G06F15/173

CPC classification number: H04L12/12 ,  Y02D50/40 ,  Y02D50/42

Abstract: A method is described that, in order to change an operational state of a resource within a computing system that is shared by components of the computing system so that the computing system's power consumption is altered, sends a packet over one or more nodal hops within a packet based network within the computing system. The packet contains information pertaining to the power consumption alteration.

Abstract translation: 描述了一种方法，为了改变由计算系统的组件共享的计算系统内的资源的操作状态，使得计算系统的功耗被改变，则在一个或多个节点内发送分组 计算系统内基于分组的网络。 该数据包包含有关功耗变化的信息。

公开(公告)号：US20050235067A1

公开(公告)日：2005-10-20

申请号：US10828872

申请日：2004-04-20

Applicant: Kenneth Creta ,  Aaron Spink ,  Lance Hacking ,  Sridhar Muthrasanallur ,  Jasmin Ajanovic

Inventor： Kenneth Creta ,  Aaron Spink ,  Lance Hacking ,  Sridhar Muthrasanallur ,  Jasmin Ajanovic

IPC: G06F13/14 ,  G06F13/40

CPC classification number: G06F13/4027

Abstract: Systems and methods of processing write transactions provide for combining write transactions on an input/output (I/O) hub according to a protocol between the I/O hub and a processor. Data associated with the write transactions can be flushed to an I/O device without the need for proprietary software and specialized registers within the I/O device.

Abstract translation: 处理写事务的系统和方法提供了根据I / O集线器和处理器之间的协议在输入/输出（I / O）集线器上组合写事务。 与写入事务相关的数据可以刷新到I / O设备，而不需要I / O设备内的专有软件和专用寄存器。

公开(公告)号：US6014735A

公开(公告)日：2000-01-11

申请号：US53391

申请日：1998-03-31

Applicant: Srinivas Chennupaty ,  Lance Hacking ,  Thomas Huff ,  Patrice L. Roussel ,  Shreekant S. Thakkar

Inventor： Srinivas Chennupaty ,  Lance Hacking ,  Thomas Huff ,  Patrice L. Roussel ,  Shreekant S. Thakkar

IPC: G06F9/318 ,  G06F9/30

CPC classification number: G06F9/30185

Abstract: The present invention discloses a method and apparatus for encoding an instruction in an instruction set which uses a prefix code to qualify an existing opcode of an existing instruction. An opcode and an escape code are selected. The escape code is selected such that it is different from the prefix code and the existing opcode. The opcode, the escape code, and the prefix code are combined to generate an instruction code which uniquely represents the operation performed by the instruction.

Abstract translation: 本发明公开了一种用于编码指令集中的指令的方法和装置，该指令使用前缀码来限定现有指令的现有操作码。 选择了操作码和转义码。 选择转义代码，使其与前缀代码和现有操作码不同。 操作码，转义码和前缀码被组合以产生唯一地表示指令执行的操作的指令代码。

公开(公告)号：US20140108684A1

公开(公告)日：2014-04-17

申请号：US13649995

申请日：2012-10-11

Applicant: Lance Hacking ,  Ramana Rachakonda ,  Belliappa Kuttanna ,  Rajesh Patel

Inventor： Lance Hacking ,  Ramana Rachakonda ,  Belliappa Kuttanna ,  Rajesh Patel

IPC: G06F13/14

CPC classification number: G06F13/14 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3243 ,  Y02D10/126 ,  Y02D10/152

Abstract: An interconnect bandwidth throttler is disclosed. The interconnect bandwidth throttler turns off the interconnect, based on whether a maximum number of transactions has taken place within a predetermined throttle window. Both the maximum number of transactions and the throttle window are adjustable. Characteristics such as performance, thermal considerations, and average power are adjustable using the interconnect bandwidth throttler.

Abstract translation: 公开了一种互连带宽调节器。 基于在预定的节气门窗口内是否发生了最大数量的交易，互连带宽调节器关闭互连。 最大交易数量和油门窗口均可调。 使用互连带宽调节器可以调整性能，散热和平均功耗等特性。

公开(公告)号：US08392728B2

公开(公告)日：2013-03-05

申请号：US11615749

申请日：2006-12-22

Applicant: Lance Hacking ,  Belliappa Kuttanna ,  Rajesh Patel ,  Ashish Choubal ,  Terry Fletcher ,  Steven S. Varnum ,  Binta Patel

Inventor： Lance Hacking ,  Belliappa Kuttanna ,  Rajesh Patel ,  Ashish Choubal ,  Terry Fletcher ,  Steven S. Varnum ,  Binta Patel

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/3253 ,  Y02D10/151

Abstract: A method to reduce idle leakage power in I/O pins of an integrated circuit using external circuitry. Initially, I/O pins on a package are subdivided into those that will also remain powered up and those that will power down during idle state. When a system enters a low power mode, a signal is sent to the external circuitry. The signal notifies the I/O pins that always remain powered up to notify the external circuitry to power down the other set of I/O pins.

Abstract translation: 使用外部电路减少集成电路的I / O引脚中的空闲漏电功率的方法。 最初，封装上的I / O引脚被细分为那些也将保持上电状态的引脚，以及在空闲状态下断电的引脚。 当系统进入低功耗模式时，信号被发送到外部电路。 该信号通知I / O引脚始终保持通电状态，以通知外部电路关闭另一组I / O引脚。

公开(公告)号：US20090248936A1

公开(公告)日：2009-10-01

申请号：US12057796

申请日：2008-03-28

Applicant: Michael E. Altenburg ,  Binta M. Patel ,  Lance Hacking ,  David K. Dean

Inventor： Michael E. Altenburg ,  Binta M. Patel ,  Lance Hacking ,  David K. Dean

IPC: G06F13/00

CPC classification number: G06F13/4013

Abstract: A front side bus swizzle mechanism modifies the front side (address and data) bus on a chip so that, when the chip is positioned on one side of a printed circuit board, connection to a second chip located on the opposite side of the printed circuit board is simplified. The simplified connection may result in less complexity and minimize the consumption of additional printed circuit board real estate.

Abstract translation: 前端总线旋转机构将芯片上的正面（地址和数据）总线修改为使得当芯片位于印刷电路板的一侧时，连接到位于印刷电路相对侧上的第二芯片 板简化了。 简化的连接可能导致更少的复杂性和最小化附加印刷电路板不动产的消耗。

公开(公告)号：US20080155280A1

公开(公告)日：2008-06-26

申请号：US11615749

申请日：2006-12-22

Applicant: Lance Hacking ,  Belliappa Kuttana ,  Rajesh Patel ,  Ashish Choubal ,  Terry Fletcher ,  Steven S. Varnum ,  Binta Patel

Inventor： Lance Hacking ,  Belliappa Kuttana ,  Rajesh Patel ,  Ashish Choubal ,  Terry Fletcher ,  Steven S. Varnum ,  Binta Patel

IPC: G06F1/00

CPC classification number: G06F1/3203 ,  G06F1/3253 ,  Y02D10/151

Abstract: A method to reduce idle leakage power in I/O pins of an integrated circuit using external circuitry. Initially, I/O pins on a package are subdivided into those that will also remain powered up and those that will power down during idle state. When a system enters a low power mode, a signal is sent to the external circuitry. The signal notifies the I/O pins that always remain powered up to notify the external circuitry to power down the other set of I/O pins.

Abstract translation: 使用外部电路减少集成电路的I / O引脚中的空闲漏电功率的方法。 最初，封装上的I / O引脚被细分为那些也将保持上电状态的引脚，以及在空闲状态下断电的引脚。 当系统进入低功耗模式时，信号被发送到外部电路。 该信号通知I / O引脚始终保持通电状态，以通知外部电路关闭另一组I / O引脚。