公开(公告)号：US20130088289A1

公开(公告)日：2013-04-11

申请号：US13617802

申请日：2012-09-14

Applicant: SunWon Kang ,  Chiwook Kim ,  Hyun jeong Woo ,  Sangjoon Hwang

Inventor： SunWon Kang ,  Chiwook Kim ,  Hyun jeong Woo ,  Sangjoon Hwang

IPC: H01L25/00

CPC classification number: H01L23/642 ,  G11C11/4074 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor chip package illuminates and minimizes a power noise generated from a voltage generation circuit in the semiconductor chip package includes an integrated circuit chip with a voltage generation circuit that receives an external voltage to generate a supply voltage to be used in an internal circuit and a connection terminal connected to an output node of the voltage generation circuit, and a mounting substrate including a noise eliminator electrically connected to the connection terminal to reduce a power noise of the supply voltage and a mounting substrate to mount the integrated circuit chip to package the integrated circuit chip as the semiconductor chip package.

Abstract translation: 半导体芯片封装照亮并最小化半导体芯片封装中由电压产生电路产生的功率噪声包括具有接收外部电压以产生要用于内部电路的电源电压的电压产生电路的集成电路芯片，以及 连接端子连接到电压产生电路的输出节点，以及安装基板，包括电连接到连接端子的噪声消除器，以降低电源电压的功率噪声，以及安装基板以安装集成电路芯片以封装集成 电路芯片作为半导体芯片封装。

公开(公告)号：US20110095418A1

公开(公告)日：2011-04-28

申请号：US12788901

申请日：2010-05-27

Applicant: HWAN-SIK LIM ,  SUNWON KANG ,  JONGHO LEE

Inventor： HWAN-SIK LIM ,  SUNWON KANG ,  JONGHO LEE

IPC: H01L23/485 ,  H01L21/50

CPC classification number: H01L24/14 ,  H01L23/3128 ,  H01L23/3192 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05578 ,  H01L2224/0603 ,  H01L2224/06515 ,  H01L2224/13025 ,  H01L2224/13028 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/1411 ,  H01L2224/14515 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/1005 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern.

Abstract translation: 半导体封装包括具有第一凸块组和第二凸块组的半导体芯片，以及具有用于与半导体芯片进行数据通信的第一图案的封装基板和用于向半导体芯片供电或将半导体芯片接地的第二图案， 其中所述第一凸块组设置在所述第一图案上，并且所述第二凸块组设置在所述第二图案上。