公开(公告)号：US11901390B2

公开(公告)日：2024-02-13

申请号：US17525968

申请日：2021-11-15

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Chien Ku ,  Huai-Jen Tung ,  Keng-Ying Liao ,  Yi-Hung Chen ,  Shih-Hsun Hsu ,  Yi-Fang Yang

IPC分类号： H01L29/40 ,  H01L23/52 ,  H01L23/48 ,  H01L27/146 ,  H01L23/00

CPC分类号： H01L27/14636 ,  H01L24/05 ,  H01L27/14643 ,  H01L2224/0214 ,  H01L2224/0345 ,  H01L2224/03831 ,  H01L2224/0557 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05571 ,  H01L2224/05578

摘要： A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.

公开(公告)号：US11894326B2

公开(公告)日：2024-02-06

申请号：US17370576

申请日：2021-07-08

申请人： ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

发明人： Rajesh Katkar ,  Cyprian Emeka Uzoh

IPC分类号： H01L23/00 ,  H01L25/00

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/0347 ,  H01L2224/0362 ,  H01L2224/0384 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/03616 ,  H01L2224/03845 ,  H01L2224/05013 ,  H01L2224/05015 ,  H01L2224/05026 ,  H01L2224/05076 ,  H01L2224/05082 ,  H01L2224/05105 ,  H01L2224/05109 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05551 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/05605 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08145 ,  H01L2224/08146 ,  H01L2224/80375 ,  H01L2224/80895 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05611 ,  H01L2924/00014 ,  H01L2224/05609 ,  H01L2924/00014 ,  H01L2224/05605 ,  H01L2924/00014 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05639 ,  H01L2924/00014

摘要： A first conductive material having a first hardness is disposed within a recess or opening of a microelectronic component, in a first preselected pattern, and forms a first portion of an interconnect structure. A second conductive material having a second hardness different from the first hardness is disposed within the recess or opening in a second preselected pattern and forms a second portion of the interconnect structure.

公开(公告)号：US20240030106A1

公开(公告)日：2024-01-25

申请号：US18480978

申请日：2023-10-04

申请人： ROHM CO., LTD.

发明人： Yosui FUTAMURA ,  Shunya MIKAMI

IPC分类号： H01L23/495 ,  H01L23/00

CPC分类号： H01L23/49513 ,  H01L24/05 ,  H01L24/08 ,  H01L24/09 ,  H01L24/45 ,  H01L24/48 ,  H01L24/32 ,  H01L2224/05073 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05686 ,  H01L2224/08059 ,  H01L2224/09055 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/48245 ,  H01L2924/182 ,  H01L2924/186

摘要： A semiconductor device includes a semiconductor element, a sealing resin and a covering portion. The semiconductor element includes an element body containing a semiconductor, and a first electrode disposed on the element body. The sealing resin covers the semiconductor element. The covering portion is interposed between the first electrode and the sealing resin. The covering portion contains a material having a higher thermal conductivity than the sealing resin. The first electrode of the semiconductor element includes a groove portion held in contact with the covering portion.

公开(公告)号：US20180277585A1

公开(公告)日：2018-09-27

申请号：US15992908

申请日：2018-05-30

申请人： Sony Corporation

发明人： Yoshihisa Kagawa ,  Kenichi Aoyagi ,  Yoshiya Hagimoto ,  Nobutoshi Fujii

IPC分类号： H01L27/146 ,  H01L21/768 ,  H04N5/369 ,  H01L23/528 ,  H01L23/532 ,  H01L23/00 ,  H01L27/06 ,  H01L23/48

CPC分类号： H01L27/14636 ,  H01L21/76807 ,  H01L21/7684 ,  H01L21/76841 ,  H01L21/76843 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L24/83 ,  H01L27/0688 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14625 ,  H01L27/1464 ,  H01L27/14645 ,  H01L27/1469 ,  H01L2221/1031 ,  H01L2224/02245 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05546 ,  H01L2224/05547 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05686 ,  H01L2224/08121 ,  H01L2224/08145 ,  H01L2224/0903 ,  H01L2224/80011 ,  H01L2224/80013 ,  H01L2224/80035 ,  H01L2224/80091 ,  H01L2224/80097 ,  H01L2224/80203 ,  H01L2224/80345 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80935 ,  H01L2224/83345 ,  H01L2924/00014 ,  H01L2924/053 ,  H01L2924/12043 ,  H01L2924/13091 ,  H04N5/369 ,  H01L2924/00012 ,  H01L2924/05442 ,  H01L2924/05042 ,  H01L2924/049 ,  H01L2924/00 ,  H01L2224/05552

摘要： Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.

公开(公告)号：US10037957B2

公开(公告)日：2018-07-31

申请号：US15350647

申请日：2016-11-14

申请人： Amkor Technology, Inc.

发明人： Greg Hames ,  Glenn Rinne ,  Devarajan Balaraman

IPC分类号： H01L21/44 ,  H01L23/00

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/92 ,  H01L24/94 ,  H01L2224/03001 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03618 ,  H01L2224/0384 ,  H01L2224/039 ,  H01L2224/03901 ,  H01L2224/0391 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0518 ,  H01L2224/05184 ,  H01L2224/0519 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/05557 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/056 ,  H01L2224/05647 ,  H01L2224/0569 ,  H01L2224/0579 ,  H01L2224/058 ,  H01L2224/11 ,  H01L2224/11462 ,  H01L2224/11614 ,  H01L2224/13026 ,  H01L2224/131 ,  H01L2224/92 ,  H01L2224/94 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/034 ,  H01L2224/0361 ,  H01L21/78 ,  H01L2924/014 ,  H01L2224/033 ,  H01L2924/0665 ,  H01L2224/03

摘要： A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing a semiconductor device comprising forming interconnection structures by at least part performing a lateral plating process, and a semiconductor device manufactured thereby.

公开(公告)号：US09837336B2

公开(公告)日：2017-12-05

申请号：US14257850

申请日：2014-04-21

申请人： STATS ChipPAC, Ltd.

发明人： Won Kyoung Choi ,  Chang Bum Yong ,  Jae Hun Ku

IPC分类号： H01L23/48 ,  H01L23/31 ,  H01L21/683 ,  H01L25/065 ,  H01L21/768 ,  H01L23/00

CPC分类号： H01L23/481 ,  H01L21/6836 ,  H01L21/768 ,  H01L21/76898 ,  H01L23/3178 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05578 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/06181 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16146 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2224/11 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/01023 ,  H01L2224/05664 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01007 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device has a plurality of conductive vias formed into a semiconductor wafer. A portion of the semiconductor wafer is removed so the conductive vias extend above a surface of the semiconductor wafer. A notch is formed in the semiconductor wafer around each of the conductive vias. The notch around the conductive vias can be formed by wet etching, dry etching, or LDA. A first insulating layer is formed over a surface of the semiconductor wafer and conductive vias and into the notch to provide stress relief between the conductive vias and semiconductor wafer. A portion of the first insulating layer is removed to expose the conductive vias. A first conductive layer and second insulating layer can be formed around the conductive vias. A second conductive layer can be formed over the conductive vias. The notch can extend into the second insulating layer.

公开(公告)号：US09583425B2

公开(公告)日：2017-02-28

申请号：US13929978

申请日：2013-06-28

申请人： Maxim Integrated Products, Inc.

发明人： Yong Li Xu ,  Tiao Zhou ,  Xiansong Chen ,  Kaysar M. Rahim ,  Viren Khandekar ,  Yi-Sheng Anthony Sun ,  Arkadii V. Samoilov

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/02165 ,  H01L2224/02185 ,  H01L2224/0219 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05541 ,  H01L2224/05548 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/05563 ,  H01L2224/05569 ,  H01L2224/05573 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/0569 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/10125 ,  H01L2224/13013 ,  H01L2224/131 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/1416 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26125 ,  H01L2224/29013 ,  H01L2224/32227 ,  H01L2224/3303 ,  H01L2224/33051 ,  H01L2224/3316 ,  H01L2224/81192 ,  H01L2224/81365 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83365 ,  H01L2224/83815 ,  H01L2924/351 ,  H01L2924/3841 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/206 ,  H01L2924/014 ,  H01L2924/00

摘要： A wafer level package includes a wafer, a lead disposed of the wafer for connecting the wafer to an electrical circuit, and a core disposed of the lead. In some embodiments, the lead disposed of the wafer is a copper pillar, and the core is plated onto the copper pillar. In some embodiments, the core is polymer screen-plated onto the lead. In some embodiments, the core extends between at least approximately thirty-five micrometers (35 μm) and fifty micrometers (50 μm) from the lead. In some embodiments, the core covers between at least approximately one-third (⅓) and one-half (½) of the surface area of the lead. In some embodiments, the core comprises a stud-shape extending from the lead. In some embodiments, the core extends perpendicularly across the lead. In some embodiments, the core extends longitudinally along the lead. Further, a portion of the core can extend perpendicularly from a longitudinal core.

摘要翻译： 晶片级封装包括晶片，用于将晶片连接到电路的晶片设置的引线和设置在引线上的芯。 在一些实施例中，设置晶片的引线是铜柱，并且芯被镀在铜柱上。 在一些实施方案中，芯是聚合物丝网电镀到引线上。 在一些实施例中，芯从引线延伸至少约35微米（35微米）和50微米（50μm）。 在一些实施例中，芯覆盖在铅的表面积的至少约三分之一（1/3）和一半（1/2）之间。 在一些实施例中，芯包括从引线延伸的螺柱形状。 在一些实施例中，芯垂直延伸穿过导线。 在一些实施例中，芯沿着引线纵向延伸。 此外，芯的一部分可以从纵向芯垂直延伸。

公开(公告)号：US09496198B2

公开(公告)日：2016-11-15

申请号：US14499222

申请日：2014-09-28

申请人： Texas Instruments Incorporated

发明人： Archana Venugopal ,  Marie Denison ,  Luigi Colombo ,  Hiep Nguyen ,  Darvin Edwards

IPC分类号： H01L23/373 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L23/367

CPC分类号： H01L23/373 ,  H01L21/4871 ,  H01L21/4889 ,  H01L23/367 ,  H01L23/3675 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/94 ,  H01L2224/03416 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05073 ,  H01L2224/05078 ,  H01L2224/05082 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05193 ,  H01L2224/05558 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05687 ,  H01L2224/05693 ,  H01L2224/08165 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83447 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0665 ,  H01L2924/04941 ,  H01L2924/014 ,  H01L2924/01006 ,  H01L2924/0503 ,  H01L2924/01005 ,  H01L2924/01074 ,  H01L2224/45099 ,  H01L2224/03

摘要： A microelectronic device includes semiconductor device with a component at a front surface of the semiconductor device and a backside heat spreader layer on a back surface of the semiconductor device. The backside heat spreader layer is 100 nanometers to 3 microns thick, has an in-plane thermal conductivity of at least 150 watts/meter-° K, and an electrical resistivity less than 100 micro-ohm-centimeters.

摘要翻译： 微电子器件包括在半导体器件的前表面处具有部件的半导体器件和在半导体器件的背面上的背面散热器层。 背面散热器层为100纳米至3微米厚，面内热导率至少为150瓦特/米-2°K，电阻率小于100微欧姆厘米。

公开(公告)号：US09040418B2

公开(公告)日：2015-05-26

申请号：US14076233

申请日：2013-11-10

申请人： International Business Machines Corporation

发明人： Mukta G. Farooq ,  John A. Griesemer ,  Gary Lafontant ,  Kevin S. Petrarca ,  Richard P. Volant

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L21/76877 ,  H01L23/481 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L25/0657 ,  H01L2224/023 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/0401 ,  H01L2224/05551 ,  H01L2224/05552 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05576 ,  H01L2224/05578 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/32145 ,  H01L2224/33181 ,  H01L2224/73203 ,  H01L2225/06513 ,  H01L2225/06544 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/053 ,  H01L2924/014 ,  H01L2924/06

摘要： Method of forming a capture pad on a semiconductor substrate. The method includes providing a semiconductor substrate having an active side and an inactive side and having a plurality of unfilled TSVs extending between the active side and the inactive side; filling the TSVs with a metal; defining capture pad areas on at least one of the active side and the inactive side adjacent to the TSVs, the defined capture pad areas comprising insulator islands and open areas; filling the open areas with the same metal to form a capture pad in direct contact with each of the TSVs, each of the capture pads having an all metal portion that follows an outline of each of the TSVs.

摘要翻译： 在半导体衬底上形成捕获垫的方法。 该方法包括提供具有活动侧和非活动侧的半导体衬底，并且具有在活动侧和非活动侧之间延伸的多个未填充TSV; 用金属填充TSVs; 在与TSV相邻的活动侧和非活动侧中的至少一个上定义捕获垫区域，所述捕获垫区域包括绝缘体岛和开放区域; 用相同的金属填充开放区域以形成与每个TSV直接接触的捕获垫，每个捕获垫具有遵循每个TSV的轮廓的全部金属部分。

公开(公告)号：US20150035171A1

公开(公告)日：2015-02-05

申请号：US13958276

申请日：2013-08-02

申请人： Infineon Technologies AG

发明人： Albert Birner ,  Helmut Brech ,  Matthias Zigldrum

IPC分类号： H01L23/00

CPC分类号： H01L24/06 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/70 ,  H01L24/73 ,  H01L2224/03831 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05557 ,  H01L2224/05578 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/0603 ,  H01L2224/06133 ,  H01L2224/06153 ,  H01L2224/09133 ,  H01L2224/09153 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40247 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45157 ,  H01L2224/45166 ,  H01L2224/45169 ,  H01L2224/45176 ,  H01L2224/45181 ,  H01L2224/45184 ,  H01L2224/48091 ,  H01L2224/48101 ,  H01L2224/48153 ,  H01L2224/48247 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/73221 ,  H01L2224/73271 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/053 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12031 ,  H01L2924/12032 ,  H01L2924/1205 ,  H01L2924/1301 ,  H01L2924/1304 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/207 ,  H01L2924/00012 ,  H01L2224/37099 ,  H01L2224/84

摘要： In accordance with an embodiment of the present invention, a semiconductor device includes a first bond pad disposed at a first side of a substrate. The first bond pad includes a first plurality of pad segments. At least one pad segment of the first plurality of pad segments is electrically isolated from the remaining pad segments of the first plurality of pad segments.

摘要翻译： 根据本发明的实施例，半导体器件包括设置在衬底的第一侧的第一接合焊盘。 第一接合焊盘包括第一多个焊盘段。 第一多个焊盘段的至少一个焊盘段与第一多个焊盘段的其余焊盘段电隔离。