Abstract:
The present invention provides a bonding head for a wedge wire bonding apparatus in which the bonding force of the transducer assembly, and also the clamping force of the wire clamping assembly are provided by permanent magnet motors including a coil formed as part of the transducer assembly and the wire clamping assembly respectively and with the coils located between magnets fixed to a bond head bracket member. The use of permanent magnet motors to provide the bonding and clamping forces results in apparatus in which the bonding and clamping forces can be controlled with high accuracy and reliability.
Abstract:
A mechanism for avoiding an initiation of control read transactions on a system bus coupling a host system having a host memory and an interface connected to a peripheral unit as data is moved between the host system and the peripheral unit is presented. Control information associated with data memory portions in host memory is written to the interface for data memory portions storing outgoing data and data memory portions to receive incoming data. The interface includes a controller to move data between the host memory and the interface by first obtaining the control information for the associated data portions. The interface writes status reports in association with the movement of data between the interface and the host memory via the system bus. The mechanism thus enables data transfers to occur via the system without the initiation of control reads in absence of an exception condition.
Abstract:
An apparatus and method for transferring data from a source memory (e.g. a host memory) to a peripheral interface via a bus utilizes a transmit buffer memory coupled to the peripheral interface, and a current time counter advancing at the rate at which data is to be transferred from the transmit buffer memory to the peripheral interface. A schedule table data structure stores entries in some or all of its locations, where each location corresponds to a point in time at which data is to be transferred from the transmit buffer memory to the peripheral interface. A schedule table pointer is used for pointing to successive locations in the schedule table. The schedule table pointer advances at a rate faster than the current time counter advances so that the schedule table pointer represents a point in time which is ahead of the point in time currently output by the current time counter. A data transfer is initiated from the source memory to the transmit buffer memory via the bus when a valid entry is stored at the location in the schedule table pointed to by the schedule table pointer. The data is then transferred out of the transmit buffer memory to the peripheral interface when the current time counter reaches the value representing at least the same point in time that was represented by the schedule table pointer when the data transfer was initiated. Data transfers from the transmit buffer memory are thereby synchronized in time with their corresponding entries in the schedule table.
Abstract:
An apparatus and method for transferring data from a source memory to a transmit buffer memory and then from the transmit buffer memory at a particular rate. A current time counter advances at the rate at which data is to be transmitted from the transmit buffer memory to the interface. A schedule memory stores entries, each valid entry being associated with data that is to be transmitted from the transmit buffer memory to the interface. A timestamp is associated with each valid entry in the schedule memory. Circuitry is then operative on each valid entry read from the schedule table to generate a request for a data transfer between the source memory and the transmit buffer memory; perform a data transfer from the source memory to the transmit buffer memory in response to the request; and transfer the data from the transmit buffer memory when the current time circuitry output reaches a value representing at least the same point in time that is represented by the timestamp associated with the entry for which the request was generated.
Abstract:
The present invention relates to compounds of Formula (I), methods for preparing these compounds, compositions, intermediates and derivatives thereof and for treating a condition including but not limited to ankylosing spondylitis, artherosclerosis, arthritis (such as rheumatoid arthritis, infectious arthritis, childhood arthritis, psoriatic arthritis, reactive arthritis), bone-related diseases (including those related to bone formation), breast cancer (including those unresponsive to anti-estrogen therapy), cardiovascular disorders, cartilage-related disease (such as cartilage injury/loss, cartilage degeneration, and those related to cartilage formation), chondrodysplasia, chondrosarcoma, chronic back injury, chronic bronchitis, chronic inflammatory airway disease, chronic obstructive pulmonary disease, diabetes, disorders of energy homeostasis, gout, pseudogout, lipid disorders, metabolic syndrome, multiple myeloma, obesity, osteoarthritis, osteogenesis imperfecta, osteolytic bone metastasis, osteomalacia, osteoporosis, Paget's disease, periodontal disease, polymyalgia rheumatica, Reiter's syndrome, repetitive stress injury, hyperglycemia, elevated blood glucose level, and insulin resistance.
Abstract:
A method for controlling network access of a television device and a module device thereof are disclosed. The method includes the following steps: inserting a network link tag in a television video, the network link tag recording a network link corresponding to the television video; transmitting the television video to the television device for playing; capturing the network link tag on the television video currently playing on the television device when receiving a network access instruction for acquiring the television video; and analyzing the network link tag to obtain the network link corresponding to the television video. This is very simple and convenient in operation. The network accessing to obtain the content of television video can thus be controlled by one button.
Abstract:
One embodiment of the present invention provides a switch. The switch includes a forwarding mechanism and a control mechanism. During operation, the forwarding mechanism forwards frames based on their Ethernet headers. The control mechanism operates the switch in conjunction with a separate physical switch as a single logical switch and assigns a virtual switch identifier to the logical switch, wherein the virtual switch identifier is associated with a link aggregation group.
Abstract:
Systems and techniques for processing and forwarding packets are described. Some embodiments provide a system (e.g., a switch) which determines an internal virtual network identifier and/or an internal policy identifier for a packet based on a port on which the packet was received and/or one or more fields in the packet. The system can then process and forward the packet based on the internal virtual network identifier and/or internal policy identifier. In some embodiments, the system encapsulates the packet in a TRILL (Transparent Interconnection of Lots of Links) packet by adding a TRILL header to the packet. In some embodiments, the scope of an internal virtual network identifier and/or an internal policy identifier may not extend beyond a switch or a module within a switch.
Abstract:
A method is provided for detection of analytes using the Surface Plasmon Resonance effect. The method comprises providing a metal film on a transparent substrate. The free surface of the metal film is exposed to a test sample. An anlyte in the sample can interact directly with the metal film or via analyte binding molecules (ABMs) complexed to the film. Light is directed incident to the surface of film in contact with the substrate. Light is reflected from the surface of the film under SPR conditions. The reflected light is collected and the second and/or third harmonics of the resulting electrical signal, which are indicative of the phase and polarization state of the reflected light, are determined. The second and third harmonics are correlated to the presence and/or concentration of the analyte.
Abstract:
An interconnect switch stores data messages received from one or more source devices and prioritizes the data messages received from each source device based on the order that the data messages were received from the source device. For each available destination device associated with the interconnect switch, the interconnect switch identifies the data messages with the highest priority that are to be routed to the available destination device and selects one of the identified data messages for the available destination device. The interconnect switch then routes the selected data messages to the available destination devices.