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公开(公告)号：US07818356B2
公开(公告)日：2010-10-19
申请号：US10612542
申请日：2003-07-01
IPC分类号： G06F5/01
CPC分类号： G06F9/30145 , G06F9/3001 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30112 , G06F9/3013 , G06F9/3816 , G06F9/3885 , G06F15/8007 , G06F17/147 , G06F17/15
摘要： Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
摘要翻译： 用于使用SIMD合并指令执行比特流缓冲器操作的方法，装置和程序装置。 一个实施例的方法包括确定在第一数据块中是否存在用于部分可变长度符号的任何未处理的数据比特。 执行移位合并操作以将来自第一数据块的未处理数据位与第二数据块合并。 形成合并的数据块。 从合并的数据块中提取由未处理的数据位和来自第二数据块的多个数据位组成的合并的可变长度符号。
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12.发明授权公开(公告)号：US07653906B2
公开(公告)日：2010-01-26
申请号：US10279630
申请日：2002-10-23
申请人： Yen-Kuang Chen , Ishmael F. Santos
发明人： Yen-Kuang Chen , Ishmael F. Santos
CPC分类号： G06F9/3851 , G06F1/3203 , G06F1/329 , Y02D10/24
摘要： Activities may be delayed from being dispatched until another activity is ready to be dispatched. Dispatching more than activities increase overlapping in execution time of activities. By delaying the dispatch of the activities, power consumption and thermal dissipation on a multi-threading processor may be reduced.
摘要翻译： 活动可能会被拖延到另一个活动准备派遣。 调动活动多于活动执行时间的重叠。 通过延迟活动的调度，可以减少多线程处理器上的功耗和散热。
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公开(公告)号：US20070014561A1
公开(公告)日：2007-01-18
申请号：US11414946
申请日：2006-05-01
申请人： Yi-Ming Lee , Yung-Chuan Chen , Yen-Kuang Chen
发明人： Yi-Ming Lee , Yung-Chuan Chen , Yen-Kuang Chen
IPC分类号： G03B3/10
CPC分类号： G03B3/10
摘要： A lens module includes a driving apparatus, a rotary device, and a lens assembly. The rotary device includes a contact portion having a continuous ramp and is rotated by the driving apparatus. The lens assembly includes a guide portion which contacts the contact portion and a lens moving along with the guide portion. A rotation of the rotary device is driven by the driving apparatus and a displacement of the lens assembly is promoted by the rotation of the rotary device via the guide portion so that focus is achieved.
摘要翻译： 透镜模块包括驱动装置，旋转装置和透镜组件。 旋转装置包括具有连续斜面并由驱动装置旋转的接触部分。 透镜组件包括接触接触部分的引导部分和与引导部分一起移动的透镜。 旋转装置的旋转由驱动装置驱动，并且通过旋转装置经由引导部的旋转促进透镜组件的位移，从而实现对焦。
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公开(公告)号：US06816949B2
公开(公告)日：2004-11-09
申请号：US10040007
申请日：2002-01-03
IPC分类号： G06F1212
CPC分类号： G06F12/0802 , G06F12/122 , G06F2212/401
摘要： A cache management operation. In one embodiment, a first recall value for a first unit of data is generated, a second recall value for a second unit of data is generated, and the first and second recall values are compared. The unit of data having the higher recall value is stored in a first section of a storage device. The unit of data having the lower recall value is stored in a second section of a storage device. A greater amount of compression is performed on the unit of data having the lower recall value.
摘要翻译： 缓存管理操作。 在一个实施例中，生成第一数据单元的第一回调值，生成第二数据单元的第二回调值，并比较第一和第二回调值。 具有较高回忆值的数据单元被存储在存储设备的第一部分中。 具有较低重调用值的数据单元被存储在存储装置的第二部分中。 对具有较低回忆值的数据单元执行更大量的压缩。
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公开(公告)号：US20190045207A1
公开(公告)日：2019-02-07
申请号：US16024364
申请日：2018-06-29
申请人： Yen-Kuang Chen , Shao-Wen Yang , Ibrahima J. Ndiour , Yiting Liao , Vallabhajosyula S. Somayazulu , Omesh Tickoo , Srenivas Varadarajan
发明人： Yen-Kuang Chen , Shao-Wen Yang , Ibrahima J. Ndiour , Yiting Liao , Vallabhajosyula S. Somayazulu , Omesh Tickoo , Srenivas Varadarajan
摘要： In one embodiment, an apparatus comprises a storage device and a processor. The storage device may store a plurality of compressed images comprising one or more compressed master images and one or more compressed slave images. The processor may: identify an uncompressed image; access context information associated with the uncompressed image and the one or more compressed master images; determine, based on the context information, whether the uncompressed image is associated with a corresponding master image; upon a determination that the uncompressed image is associated with the corresponding master image, compress the uncompressed image into a corresponding compressed image with reference to the corresponding master image; upon a determination that the uncompressed image is not associated with the corresponding master image, compress the uncompressed image into the corresponding compressed image without reference to the one or more compressed master images; and store the corresponding compressed image on the storage device.
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公开(公告)号：US20190042870A1
公开(公告)日：2019-02-07
申请号：US16024397
申请日：2018-06-29
申请人： Yen-Kuang Chen , Shao-Wen Yang , Ibrahima J. Ndiour , Yiting Liao , Vallabhajosyula S. Somayazulu , Omesh Tickoo , Srenivas Varadarajan
发明人： Yen-Kuang Chen , Shao-Wen Yang , Ibrahima J. Ndiour , Yiting Liao , Vallabhajosyula S. Somayazulu , Omesh Tickoo , Srenivas Varadarajan
摘要： In one embodiment, an apparatus comprises a memory and a processor. The memory is to store visual data associated with a visual representation captured by one or more sensors. The processor is to: obtain the visual data associated with the visual representation captured by the one or more sensors, wherein the visual data comprises uncompressed visual data or compressed visual data; process the visual data using a convolutional neural network (CNN), wherein the CNN comprises a plurality of layers, wherein the plurality of layers comprises a plurality of filters, and wherein the plurality of filters comprises one or more pixel-domain filters to perform processing associated with uncompressed data and one or more compressed-domain filters to perform processing associated with compressed data; and classify the visual data based on an output of the CNN.
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17.发明授权公开(公告)号：US09513905B2
公开(公告)日：2016-12-06
申请号：US12079774
申请日：2008-03-28
申请人： Mikhail Smelyanskiy , Sanjeev Kumar , Daehyun Kim , Jatin Chhugani , Changkyu Kim , Christopher J. Hughes , Victor W. Lee , Anthony D. Nguyen , Yen-Kuang Chen
发明人： Mikhail Smelyanskiy , Sanjeev Kumar , Daehyun Kim , Jatin Chhugani , Changkyu Kim , Christopher J. Hughes , Victor W. Lee , Anthony D. Nguyen , Yen-Kuang Chen
CPC分类号： G06F9/30036 , G06F9/30018 , G06F9/30021 , G06F9/30032 , G06F9/3004 , G06F9/30043 , G06F9/30087 , G06F9/3834 , G06F9/3885 , G06K9/6212 , G06T5/40 , H04N1/4074
摘要： In one embodiment, a processor may include a vector unit to perform operations on multiple data elements responsive to a single instruction, and a control unit coupled to the vector unit to provide the data elements to the vector unit, where the control unit is to enable an atomic vector operation to be performed on at least some of the data elements responsive to a first vector instruction to be executed under a first mask and a second vector instruction to be executed under a second mask. Other embodiments are described and claimed.
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公开(公告)号：US08972698B2
公开(公告)日：2015-03-03
申请号：US12976616
申请日：2010-12-22
申请人： Christopher J. Hughes , Mark J. Charney , Yen-Kuang Chen , Jesus Corbal , Andrew T. Forsyth , Milind B. Girkar , Jonathan C. Hall , Hideki Ido , Robert Valentine , Jeffrey Wiedemeier
发明人： Christopher J. Hughes , Mark J. Charney , Yen-Kuang Chen , Jesus Corbal , Andrew T. Forsyth , Milind B. Girkar , Jonathan C. Hall , Hideki Ido , Robert Valentine , Jeffrey Wiedemeier
CPC分类号： G06F9/30036 , G06F9/30018 , G06F9/30021 , G06F9/30032 , G06F9/30043 , G06F9/3838
摘要： A processing core implemented on a semiconductor chip is described having first execution unit logic circuitry that includes first comparison circuitry to compare each element in a first input vector against every element of a second input vector. The processing core also has second execution logic circuitry that includes second comparison circuitry to compare a first input value against every data element of an input vector.
摘要翻译： 描述了在半导体芯片上实现的处理核心，其具有包括第一比较电路的第一执行单元逻辑电路，以将第一输入向量中的每个元素与第二输入向量的每个元素进行比较。 处理核心还具有第二执行逻辑电路，其包括第二比较电路，用于将第一输入值与输入向量的每个数据元素进行比较。
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19.发明授权Technique for tracking shared data in a multi-core processor or multi-processor system 有权用于跟踪多核处理器或多处理器系统中的共享数据的技术公开(公告)号：US08719500B2
公开(公告)日：2014-05-06
申请号：US12592998
申请日：2009-12-07
IPC分类号： G06F12/00
CPC分类号： G06F12/0817
摘要： A technique to track shared information in a multi-core processor or multi-processor system. In one embodiment, core identification information (“core IDs”) are used to track shared information among multiple cores in a multi-core processor or multiple processors in a multi-processor system.
摘要翻译： 一种在多核处理器或多处理器系统中跟踪共享信息的技术。 在一个实施例中，核心识别信息（“核心ID”）用于在多处理器系统中的多核处理器或多个处理器中的多个核之间跟踪共享信息。
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20.发明授权公开(公告)号：US08578097B2
公开(公告)日：2013-11-05
申请号：US13280117
申请日：2011-10-24
IPC分类号： G06F12/00
CPC分类号： G06F12/0806 , G06F12/08 , G06F12/0811 , G06F12/0815 , G06F12/0817 , G06F12/0862 , G06F12/0877 , G06F12/0891 , G06F12/0897 , G06F2212/6026 , G06F2212/62 , G11C7/1072 , G11C7/1075 , Y02D10/13
摘要： A scatter/gather technique optimizes unstructured streaming memory accesses, providing off-chip bandwidth efficiency by accessing only useful data at a fine granularity, and off-loading memory access overhead by supporting address calculation, data shuffling, and format conversion.
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