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169 条记录 (耗时 0.036 秒)

    NON-VOLATILE MEMORY DEVICE
    14.
    发明申请
    NON-VOLATILE MEMORY DEVICE 有权
    非易失性存储器件

    公开(公告)号：US20120326225A1

    公开(公告)日：2012-12-27

    申请号：US13529621

    申请日：2012-06-21

    申请人： SUNG-IL CHANG ,  Young-Woo Park

    发明人： SUNG-IL CHANG ,  Young-Woo Park

    IPC分类号： H01L29/792

    CPC分类号： H01L21/764 ,  H01L21/76224 ,  H01L27/11563 ,  H01L27/11568 ,  H01L29/792

    摘要： A non-volatile memory device includes a substrate having an active region defined by a device isolation region that has a trench and an air gap, a device isolation pattern positioned at a lower portion of the trench, a memory cell layer including a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the active region and one of which extends from the active region toward the device isolation region encloses top of the air gap whose bottom is defined by a layer other than that of the top, and a control gate electrode positioned on the cell structure. The one of the insulation layer extending includes a recess at a region corresponding to the center of the air gap.

    摘要翻译： 非易失性存储器件包括具有由具有沟槽和气隙的器件隔离区限定的有源区的衬底，位于沟槽下部的器件隔离图案，包括隧道绝缘层的存储单元层 ，顺序堆叠在有源区上并且其中一个从有源区向器件隔离区延伸的陷阱绝缘层和阻挡绝缘层包围气隙的顶部，其底部由不同于 顶部和位于电池结构上的控制栅电极。 绝缘层延伸的一个包括在对应于气隙的中心的区域处的凹部。

    Non-volatile memory device
    15.
    发明授权
    Non-volatile memory device 失效
    非易失性存储器件

    公开(公告)号：US08169018B2

    公开(公告)日：2012-05-01

    申请号：US12713736

    申请日：2010-02-26

    申请人： Jang-hyun You ,  Jin-taek Park ,  Young-woo Park ,  Jung-dal Choi

    发明人： Jang-hyun You ,  Jin-taek Park ,  Young-woo Park ,  Jung-dal Choi

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  H01L27/11565 ,  H01L27/11573 ,  H01L29/4234

    摘要： A non-volatile memory device includes a semiconductor layer including a cell region and a peripheral region, a cell region gate structure disposed in the cell region of the semiconductor layer, and wherein the cell region gate structure includes a tunneling insulating layer and a first blocking insulating layer, a second blocking insulating layer, and a third blocking insulating layer. The no-volatile memory device further includes a peripheral region gate structure formed in the peripheral region of the semiconductor layer. The peripheral region gate structure includes a first peripheral region insulating layer including a same material as a material included in the tunneling insulating layer and a second peripheral region insulating layer including a same material as a material included in the third blocking insulating layer.

    摘要翻译： 非易失性存储器件包括包括单元区域和外围区域的半导体层，设置在半导体层的单元区域中的单元区域栅极结构，并且其中单元区域栅极结构包括隧道绝缘层和第一阻挡层 绝缘层，第二阻挡绝缘层和第三阻挡绝缘层。 非易失性存储器件还包括形成在半导体层的周边区域中的外围区域栅极结构。 周边区域栅极结构包括：第一周边区域绝缘层，其包括与包含在隧道绝缘层中的材料相同的材料;以及第二周边区域绝缘层，其包括与包含在第三阻挡绝缘层中的材料相同的材料。

    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND RELATED METHOD OF MANUFACTURE
    16.
    发明申请
    THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND RELATED METHOD OF MANUFACTURE 审中-公开
    三维半导体存储器件及其制造方法

    公开(公告)号：US20120086072A1

    公开(公告)日：2012-04-12

    申请号：US13193702

    申请日：2011-07-29

    申请人： Jong-in Yun ,  Jin-Soo Lim ,  Han-soo Kim ,  Sung-Hwan Jang ,  Young-woo Park ,  Byoung-keun Son

    发明人： Jong-in Yun ,  Jin-Soo Lim ,  Han-soo Kim ,  Sung-Hwan Jang ,  Young-woo Park ,  Byoung-keun Son

    IPC分类号： H01L29/78

    CPC分类号： H01L29/78 ,  H01L21/31111 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/40117 ,  H01L29/66833 ,  H01L29/7926

    摘要： A method of manufacturing a three-dimensional semiconductor memory device comprises forming a thin layer structure by alternately stacking first and second material layers on a substrate, forming a penetration dent penetrating the thin layer structure and exposing a top surface of the substrate recessed by the penetration dent, forming a vertical insulation layer penetrating the thin layer structure to cover an inner wall of the penetration dent, forming a semiconductor pattern penetrating the vertical insulation layer at the penetration dent to be inserted into the substrate, and forming an oxide layer between the thin layer structure and the substrate by oxidizing a sidewall of the penetration dent.

    摘要翻译： 一种制造三维半导体存储器件的方法包括通过在衬底上交替地堆叠第一和第二材料层来形成薄层结构，形成穿透薄层结构的穿透凹陷，并使基底凹陷的顶部表面露出 形成穿透薄层结构的垂直绝缘层以覆盖穿透凹陷的内壁，形成穿透穿孔凹陷处的垂直绝缘层的半导体图案，以插入到基板中，并且在薄的层间形成氧化物层 通过氧化渗透凹陷的侧壁来形成层状结构和基底。

    WIDE ANGLE LENS SYSTEM AND PHOTOGRAPHING APPARATUS
    17.
    发明申请
    WIDE ANGLE LENS SYSTEM AND PHOTOGRAPHING APPARATUS 有权
    宽角度透镜系统和摄影装置

    公开(公告)号：US20120056976A1

    公开(公告)日：2012-03-08

    申请号：US13089518

    申请日：2011-04-19

    申请人： Yong-jae Lee ,  Young-woo Park

    发明人： Yong-jae Lee ,  Young-woo Park

    IPC分类号： H04N5/225 ,  G02B15/14

    CPC分类号： G02B15/177 ,  G02B13/04

    摘要： A wide angle lens system includes a first lens group having a negative refractive power and a second lens group having a positive refractive power arranged from an object side. The first lens group includes a first lens of a meniscus shape having a convex surface toward the object side, a second lens having a concave surface toward the object side, and a third lens having a convex surface toward the object side, and the second lens group includes a fourth lens having a convex surface toward the object side, a fifth lens having a concave surface toward the object side, and a sixth lens of a meniscus shape having a concave surface toward the object side. A photographing apparatus includes the wide angle lens system.

    摘要翻译： 广角透镜系统包括具有负折光力的第一透镜组和具有从物体侧布置的正折光力的第二透镜组。 第一透镜组包括具有朝向物体侧的凸面的弯液面形状的第一透镜，具有朝向物体侧的凹面的第二透镜和朝向物体侧的凸面的第三透镜，第二透镜 具有朝向物体侧的凸面的第四透镜，朝向物体侧的凹面的第五透镜和朝向物体侧的凹面的弯液面状的第六透镜。 拍摄装置包括广角镜头系统。

    Non-volatile memory devices including dummy word lines and related structures and methods
    20.
    发明授权
    Non-volatile memory devices including dummy word lines and related structures and methods 有权
    包括虚拟字线和相关结构和方法的非易失性存储器件

    公开(公告)号：US08045383B2

    公开(公告)日：2011-10-25

    申请号：US11729169

    申请日：2007-03-28

    申请人： Jong-Sun Sel ,  Jung-Dal Choi ,  Young-Woo Park ,  Jin-Taek Park

    发明人： Jong-Sun Sel ,  Jung-Dal Choi ,  Young-Woo Park ,  Jin-Taek Park

    IPC分类号： G11C11/34

    CPC分类号： G11C16/0483 ,  G11C16/3427

    摘要： A non-volatile memory device may include a semiconductor substrate including an active region at a surface thereof, a first memory cell string on the active region, and a second memory cell string on the active region. The first memory cell string may include a first plurality of word lines crossing the active region between a first ground select line and a first string select line, and about a same first spacing may be provided between adjacent ones of the first plurality of word lines. The second memory cell string may include a second plurality of word lines crossing the active region between a second ground select line and a second string select line, and about the same first spacing may be provided between adjacent ones of the second plurality of word lines. Moreover, the first ground select line may be between the second ground select line and the first plurality of word lines, and the second ground select line may be between the first ground select line and the second plurality of word lines. Moreover, portions of the active region between the first and second ground select lines may be free of word lines, and a second spacing between the first and second ground select lines may be at least about 3 times greater than the first spacing. Related methods are also discussed.

    摘要翻译： 非易失性存储器件可以包括半导体衬底，其包括其表面处的有源区，有源区上的第一存储单元串和有源区上的第二存储单元串。 第一存储单元串可以包括与第一地选择线和第一串选择线之间的有源区域交叉的第一多个字线，并且可以在第一多个字线中相邻的字线之间提供约相同的第一间隔。 第二存储单元串可以包括与第二接地选择线和第二串选择线之间的有源区域交叉的第二多个字线，并且可以在相邻的第二多个字线之间提供约相同的第一间隔。 此外，第一接地选择线可以在第二接地选择线和第一多个字线之间，并且第二接地选择线可以在第一接地选择线和第二多个字线之间。 此外，第一和第二接地选择线之间的有源区域的部分可以没有字线，并且第一和第二接地选择线之间的第二间隔可以比第一间隔大至少约3倍。 还讨论了相关方法。