公开(公告)号：US20110227129A1

公开(公告)日：2011-09-22

申请号：US13131498

申请日：2009-11-26

申请人： Sadanori Yamanaka ,  Masahiko Hata ,  Tomoyuki Takada

发明人： Sadanori Yamanaka ,  Masahiko Hata ,  Tomoyuki Takada

IPC分类号： H01L29/12 ,  H01L21/20

CPC分类号： H01L21/8258 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02636

摘要： A semiconductor wafer including: a base wafer; a seed crystal disposed on the base wafer; a compound semiconductor disposed above the seed crystal; and a high resistance layer disposed between the seed crystal and the compound semiconductor, the high resistance layer having a larger resistivity than the seed crystal, and the seed crystal lattice matching or pseudo lattice matching the compound semiconductor is provided.

摘要翻译： 一种半导体晶片，包括：基底晶片; 设置在基底晶片上的晶种; 设置在晶种上方的化合物半导体; 以及设置在晶种和化合物半导体之间的高电阻层，具有比晶种更大的电阻率的高电阻层，并且提供晶种匹配或伪晶格匹配化合物半导体。

公开(公告)号：US20110018030A1

公开(公告)日：2011-01-27

申请号：US12811074

申请日：2008-12-26

申请人： Tomoyuki Takada ,  Sadanori Yamanaka ,  Masahiko Hata

发明人： Tomoyuki Takada ,  Sadanori Yamanaka ,  Masahiko Hata

IPC分类号： H01L29/12 ,  H01L21/20

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02516 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/205 ,  H01L29/66242 ,  H01L29/7371

摘要： A high-quality GaAs-type crystal thin film using an inexpensive Si water with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region; a Ge layer that is crystal-grown in the open region; a buffer layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be formed by annealing with a temperature and duration that enables movement of crystal defects.

摘要翻译： 实现了使用具有良好热释放特性的廉价Si水的高质量GaAs型晶体薄膜。 提供了包括Si晶片的半导体晶片; 所述抑制层形成在所述晶片上并且抑制晶体生长，所述抑制层包括覆盖所述晶片的一部分的覆盖区域和不覆盖所述覆盖区域内的所述晶片的一部分的开放区域; 在开放区域晶体生长的Ge层; 在Ge层上晶体生长并且是含有P的3-5族化合物半导体层的缓冲层; 以及在缓冲层上晶体生长的功能层。 Ge层可以通过使得能够移动晶体缺陷的温度和持续时间退火而形成。

公开(公告)号：US20110006368A1

公开(公告)日：2011-01-13

申请号：US12920457

申请日：2009-02-27

申请人： Masahiko Hata ,  Tomoyuki Takada

发明人： Masahiko Hata ,  Tomoyuki Takada

IPC分类号： H01L29/786 ,  H01L29/30 ,  H01L21/20

CPC分类号： H01L21/845 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/0245 ,  H01L21/02521 ,  H01L21/02546 ,  H01L21/02639 ,  H01L21/02647 ,  H01L27/1211 ,  H01L29/78648 ,  H01L29/78681

摘要： The objective is to improve capabilities such as high-speed switching of a compound semiconductor device. Provided is a semiconductor wafer comprising a silicon wafer; an insulating film that is formed on the silicon wafer and that includes an open portion reaching the silicon wafer and having an aspect ratio of √3/3 or more; a seed compound semiconductor crystal that is formed in the open portion and that protrudes beyond a surface of the insulating film; and a laterally grown compound semiconductor layer that is laterally grown on the insulating film with a specified surface of the seed compound semiconductor crystal as a seed surface.

摘要翻译： 目的是提高复合半导体器件的高速切换等能力。 提供了包括硅晶片的半导体晶片; 形成在硅晶片上并且包括到达硅晶片的开口部分并且具有√3/ 3或更大的纵横比的绝缘膜; 种子化合物半导体晶体，其形成在所述开放部分中并且突出超过所述绝缘膜的表面; 横向生长的化合物半导体层，其以种子化合物半导体晶体的指定表面作为种子表面在绝缘膜上横向生长。

公开(公告)号：US20060192228A1

公开(公告)日：2006-08-31

申请号：US10545295

申请日：2004-02-04

申请人： Tsuyoshi Nakano ,  Masahiko Hata

发明人： Tsuyoshi Nakano ,  Masahiko Hata

IPC分类号： H01L31/00

CPC分类号： H01L29/205

摘要： A compound semiconductor epitaxial substrate having a pseudomorphic high electron mobility field effect transistor structure including an InGaAs layer as a strained channel layer and an AlGaAs layer containing n type impurities as a front side electron-donating layer, wherein said substrate contains an InGaP layer in an orderly state on the front side of the above described InGaAs layer as the strained channel layer.

摘要翻译： 一种具有假型高电子迁移率场效应晶体管结构的化合物半导体外延衬底，其包括作为应变沟道层的InGaAs层和含有n型杂质的AlGaAs层作为前侧电子给予层，其中所述衬底包含InGaP层， 在作为应变通道层的上述InGaAs层的正面上有序地形成。

公开(公告)号：US06569693B2

公开(公告)日：2003-05-27

申请号：US09865482

申请日：2001-05-29

申请人： Masahiko Hata ,  Yasunari Zempo

发明人： Masahiko Hata ,  Yasunari Zempo

IPC分类号： H01L2166

CPC分类号： H01L21/0262 ,  H01L21/0237 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02505 ,  H01L21/02546

摘要： Provided is a method for fabricating a compound semiconductor multilayer epitaxial substrate comprising a plurality of epitaxial layers, comprising the steps of determining at least one of the thickness, impurity concentration, and composition of an epitaxial layer comprising the multilayer epitaxial substrate by theoretical calculation, the theoretical calculation describing on electric field and charge distribution inside the epitaxial layer, and performing epitaxy of the epitaxial layer according to the theoretical calculation of the thickness, impurity concentration and/or composition of the epitaxial layer so that measurable electric characteristics of the substrate predetermined by the calculation are satisfied. The method can reduce the fabrication process and also can be applied to manufacture a multilayer epitaxial substrate having a unique structure.

摘要翻译： 提供了一种制造包含多个外延层的化合物半导体多层外延衬底的方法，包括以下步骤：通过理论计算来确定包括多层外延衬底的外延层的厚度，杂质浓度和组成中的至少一个， 描述外延层内的电场和电荷分布的理论计算，以及根据外延层的厚度，杂质浓度和/或组成的理论计算来执行外延层的外延，从而使基板的可测量的电特性由 计算得到满足。 该方法可以减少制造工艺，并且还可以应用于制造具有独特结构的多层外延衬底。

公开(公告)号：US10340375B2

公开(公告)日：2019-07-02

申请号：US12527142

申请日：2008-02-12

申请人： Masahiko Hata ,  Hiroyuki Sazawa ,  Naohiro Nishikawa

发明人： Masahiko Hata ,  Hiroyuki Sazawa ,  Naohiro Nishikawa

IPC分类号： H01L29/06 ,  H01L31/00 ,  H01L29/778 ,  H01L29/207 ,  H01L29/66 ,  H01L21/02 ,  H01L29/20

摘要： The present invention provides an epitaxial substrate for field effect transistor. In the epitaxial substrate for field effect transistor, a nitride-based Group III-V semiconductor epitaxial crystal containing Ga is interposed between the ground layer and the operating layer, and the nitride-based Group III-V semiconductor epitaxial crystal includes the following (i), (ii) and (iii). (i) a first buffer layer containing Ga or Al and containing a high resistivity crystal layer having added thereto compensation impurity element present in the same period as Ga in the periodic table and having small atomic number; (ii) a second buffer layer containing Ga or Al, laminated on the operating layer side of the first buffer layer; and (iii) a high purity epitaxial crystal layer containing acceptor impurities in a slight amount such that non-addition or depletion state can be maintained, provided between the high resistivity layer and the operating layer.

公开(公告)号：US08835906B2

公开(公告)日：2014-09-16

申请号：US13310522

申请日：2011-12-02

申请人： Masahiko Hata ,  Tomoyuki Takada ,  Sadanori Yamanaka ,  Taro Itatani

发明人： Masahiko Hata ,  Tomoyuki Takada ,  Sadanori Yamanaka ,  Taro Itatani

IPC分类号： H01L31/0352 ,  H01L31/18 ,  H01L31/103 ,  H01L27/144 ,  H01L31/052 ,  H01L31/0392 ,  G01J5/02

CPC分类号： H01L27/1446 ,  G01J5/024 ,  H01L31/0392 ,  H01L31/0543 ,  H01L31/1035 ,  H01L31/1852 ,  Y02E10/52 ,  Y02E10/544 ,  Y02P70/521

摘要： A sensor includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat, where the photothermal absorber outputs an electric signal in response to incident light to be introduced into the photothermal absorber or heat to be applied to the photothermal absorber. A semiconductor wafer includes: a base wafer containing silicon; a seed member provided directly or indirectly on the base wafer; and a photothermal absorber that is made of a Group 3-5 compound semiconductor lattice-matching or pseudo lattice-matching the seed member and being capable of generating a carrier upon absorbing light or heat.

摘要翻译： 传感器包括：含有硅的基底晶片; 种子构件直接或间接地设置在基底晶片上; 以及由第3-5族化合物半导体晶格匹配或伪晶格匹配种子构件并且能够在吸收光或热时产生载体的光热吸收体，其中光热吸收体输出响应于 入射到光热吸收器中的入射光或被加到光热吸收器上的热量。 半导体晶片包括：含有硅的基底晶片; 种子构件直接或间接地设置在基底晶片上; 以及由3-5族化合物半导体晶格匹配或伪晶格匹配种子构件制成并且能够在吸收光或热时产生载体的光热吸收剂。

公开(公告)号：US08809908B2

公开(公告)日：2014-08-19

申请号：US12811038

申请日：2008-12-26

申请人： Tomoyuki Takada ,  Sadanori Yamanaka ,  Masahiko Hata

发明人： Tomoyuki Takada ,  Sadanori Yamanaka ,  Masahiko Hata

IPC分类号： H01L21/20

CPC分类号： H01L21/02381 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/8258 ,  H01L27/0605 ,  H01L29/22 ,  H01L29/66318 ,  H01L29/737 ,  H01L29/7786

摘要： A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; a Ge layer that is crystal-grown on the wafer and shaped as an isolated island; a buffer layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be shaped as an island having a size that does not exceed double a distance moved by crystal defects as a result of annealing the Ge layer at a certain temperature for a certain time. The Ge layer may be shaped as an island having a size for which stress due to a difference relative to a thermal expansion coefficient of Si, which is material of the wafer, does not cause crystal defects when the Ge layer is annealed at a certain temperature.

摘要翻译： 实现了具有良好热释放特性的廉价Si晶片的高质量GaAs型晶体薄膜。 提供了包括Si晶片的半导体晶片; 在晶片上晶体生长并形成孤岛的Ge层; 在Ge层上晶体生长并且是含有P的3-5族化合物半导体层的缓冲层; 以及在缓冲层上晶体生长的功能层。 Ge层可以成形为岛，其尺寸不超过由晶格缺陷移动的距离的两倍，这是由于Ge层在一定温度下退火一定时间的结果。 Ge层可以成形为具有如下尺寸的岛，即当Ge层在一定温度下退火时，具有相对于作为晶片材料的Si的热膨胀系数的差的应力不会引起晶体缺陷的尺寸 。

公开(公告)号：US08729677B2

公开(公告)日：2014-05-20

申请号：US13131498

申请日：2009-11-26

申请人： Sadanori Yamanaka ,  Masahiko Hata ,  Tomoyuki Takada

发明人： Sadanori Yamanaka ,  Masahiko Hata ,  Tomoyuki Takada

IPC分类号： H01L29/04

CPC分类号： H01L21/8258 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02636

摘要： A semiconductor wafer including: a base wafer; a seed crystal disposed on the base wafer; a compound semiconductor disposed above the seed crystal; and a high resistance layer disposed between the seed crystal and the compound semiconductor, the high resistance layer having a larger resistivity than the seed crystal, and the seed crystal lattice matching or pseudo lattice matching the compound semiconductor is provided.

摘要翻译： 一种半导体晶片，包括：基底晶片; 设置在基底晶片上的晶种; 设置在晶种上方的化合物半导体; 以及设置在晶种和化合物半导体之间的高电阻层，具有比晶种更大的电阻率的高电阻层，并且提供晶种匹配或伪晶格匹配化合物半导体。

公开(公告)号：US20110227042A1

公开(公告)日：2011-09-22

申请号：US13131523

申请日：2009-11-26

申请人： Tomoyuki Takada ,  Masahiko Hata ,  Hisashi Yamada

发明人： Tomoyuki Takada ,  Masahiko Hata ,  Hisashi Yamada

IPC分类号： H01L29/165 ,  H01L21/268 ,  G05D23/00

CPC分类号： H01L21/02532 ,  H01L21/02667 ,  H01L21/2686 ,  H01L21/67115 ,  H01L29/78

摘要： There is provided a method of producing a semiconductor wafer by thermally processing a base water having a portion to be thermally processed that is to be thermally processed. The method comprises a step of providing, on the base wafer, a portion to be heated that generates heat through absorption of an electromagnetic wave and selectively heats the portion to be thermally processed, a step of applying an electromagnetic wave to the base wafer, and a step of lowering the lattice defect density of the portion to he thermally processed, by means of the heat generated by the portion to be heated through the absorption of the electromagnetic wave.

摘要翻译： 提供了通过热处理具有待热处理部分的基础水来制造半导体晶片的方法。 该方法包括在基底晶片上提供通过吸收电磁波产生热并选择性地加热待热处理的部分的加热部分，向基底晶片施加电磁波的步骤，以及 借助于被加热部分通过吸收电磁波而产生的热，降低热处理部分的晶格缺陷密度的步骤。