公开(公告)号：US09112263B2

公开(公告)日：2015-08-18

申请号：US13032854

申请日：2011-02-23

Applicant: Alberto Pagani ,  Alessandro Finocchiaro ,  Giovanni Girlando

Inventor： Alberto Pagani ,  Alessandro Finocchiaro ,  Giovanni Girlando

IPC: G08B21/00 ,  H01Q1/22 ,  G06K19/077 ,  H01Q1/52

CPC classification number: H01Q1/2225 ,  G06K19/07749 ,  G06K19/07775 ,  G06K19/07779 ,  H01L21/268 ,  H01L21/67115 ,  H01L21/67253 ,  H01L22/26 ,  H01L22/34 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/5227 ,  H01L23/66 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6672 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01Q1/526 ,  Y10T29/49004 ,  H01L2924/00

Abstract: An embodiment of an electronic communications device, including: a body of semiconductor material defining at least one integrated electronic circuit and having a top surface; an electromagnetic shield; a radiant element; and a capacitive element formed by a first electrode and a second electrode, the radiant element being set on the top surface and being ohmically coupled to the first electrode and the second electrode by means of a first connection element and a second connection element, respectively, the electromagnetic shield being set between the radiant element and the top surface and forming at least the second electrode.

Abstract translation: 一种电子通信设备的实施例，包括：限定至少一个集成电子电路并具有顶表面的半导体材料体; 电磁屏蔽; 辐射元素; 以及由第一电极和第二电极形成的电容元件，所述辐射元件分别设置在所述顶表面上，并且分别通过第一连接元件和第二连接元件欧姆耦合到所述第一电极和所述第二电极， 所述电磁屏蔽被设置在所述辐射元件和所述顶表面之间并且至少形成所述第二电极。

公开(公告)号：US09000788B2

公开(公告)日：2015-04-07

申请号：US12625188

申请日：2009-11-24

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/3187 ,  G01R31/317

CPC classification number: G01R31/31713

Abstract: A method of electrical testing electronic devices DUT, comprising: connecting at least an electronic device DUT to an automatic testing apparatus suitable for performing the testing of digital circuits or memories or of digital circuits and memories; sending electrical testing command signals to the electronic device DUT by means of the ATE apparatus; performing electrical testing of the electronic device DUT by means of at least one advanced supervised self testing system “Advanced Low Pin Count BIST” ALB which is built in the electronic device DUT, the ALB system being digitally interfaced with the ATE through a dedicated digital communication channel; and sending reply messages, if any, which comprise measures, failure information and reply data to the command signals from the electronic device DUT toward the ATE apparatus by means of the digital communication channel.

Abstract translation: 一种电气测试电子设备DUT的方法，包括：至少将电子设备DUT连接到适于执行数字电路或存储器或数字电路和存储器的测试的自动测试设备; 通过ATE设备向电子设备DUT发送电测试命令信号; 通过至少一个高级监督自检系统“内置在电子设备DUT”中的“高级低引脚数BIST”ALB进行电子设备DUT的电气测试，ALB系统通过专用数字通信与ATE进行数字接口 渠道; 并且通过数字通信信道向电子设备DUT向ATE设备发送包括测量，故障信息和答复数据的回复消息（如果有的话）到命令信号。

公开(公告)号：US08829931B2

公开(公告)日：2014-09-09

申请号：US13252895

申请日：2011-10-04

Applicant: Alberto Pagani ,  Jean-Michel Bard

Inventor： Alberto Pagani ,  Jean-Michel Bard

IPC: G01R31/00 ,  G06F11/26

CPC classification number: G06F11/26

Abstract: A testing method is described of at least one device provided with an integrated testing circuit and in communication with at least one tester where messages/instructions/test signals/information are exclusively sent from the tester to the device. A testing architecture is also described for implementing this testing method.

Abstract translation: 描述了至少一个设置有集成测试电路并且与至少一个测试器进行通信的测试方法，其中消息/指令/测试信号/信息从测试仪专门发送到设备。 还描述了用于实现该测试方法的测试架构。

公开(公告)号：US08643395B2

公开(公告)日：2014-02-04

申请号：US13006942

申请日：2011-01-14

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/02

CPC classification number: G01R31/2851 ,  G01R31/2886 ,  G01R31/3025 ,  G01R31/303 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die.

Abstract translation: 一种集成在半导体材料裸片上并适于至少部分地被无线测试的集成电路，其中用于设置用于集成电路的无线测试的所选无线电通信频率的电路集成在半导体材料裸片上。

公开(公告)号：US08441272B2

公开(公告)日：2013-05-14

申请号：US12649109

申请日：2009-12-29

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R1/067

CPC classification number: G01R1/06716 ,  G01R1/06727 ,  G01R1/06733

Abstract: A MEMS probe adapted to contact a corresponding terminal of an integrated circuit, integrated on at least one chip of a semiconductor material wafer during a test phase of the wafer is provided. The probe includes a support structure comprising a first access terminal and a second access terminal; the support structure defines a conductive path between said first access terminal and said second access terminal. The probes further-includes a probe region connected to the support structure adapted to contact the corresponding terminal of the integrated circuit during the test phase for providing at least one test signal received from the first access terminal and the second access terminal to the integrated circuit through at least one portion of the conductive path, and/or providing at least one test signal generated by the integrated circuit to at least one between the first access terminal and the second access terminal trough at least one portion of the conductive path. The probe region is arranged on the conductive path of the support structure between said first access terminal and said second access terminal.

Abstract translation: 提供一种MEMS探针，其适于在晶片的测试阶段期间与集成在半导体材料晶片的至少一个芯片上的集成电路的相应端子接触。 探针包括支撑结构，该支撑结构包括第一接入终端和第二接入终端; 所述支撑结构限定所述第一接入终端与所述第二接入终端之间的导电路径。 所述探头进一步包括连接到所述支撑结构的探针区域，所述探测区域在所述测试阶段期间与所述集成电路的相应端子接触，以便从所述第一接入终端接收的至少一个测试信号和所述第二接入终端通过 所述导电路径的至少一部分，和/或将由所述集成电路产生的至少一个测试信号提供给所述第一接入终端和所述第二接入终端之间的至少一个在所述导电路径的至少一部分。 探针区域布置在所述第一接入终端和所述第二接入终端之间的支撑结构的导电路径上。

公开(公告)号：US20130057312A1

公开(公告)日：2013-03-07

申请号：US13579562

申请日：2011-02-16

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: H01L23/58 ,  G01R31/26

CPC classification number: G01R31/275 ,  G01R31/2853 ,  H01L21/76898 ,  H01L22/34 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An embodiment of a testing system for carrying out electrical testing of at least one first through via extending, at least in part, through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the first through via and to electrical-connection elements carried by the first body for electrical connection towards the outside; the first electrical test circuit enables detection of at least one electrical parameter of the first through via through the electrical-connection elements.

Abstract translation: 用于进行至少一个第一通孔的电测试的测试系统的实施例，所述至少一个第一通孔至少部分地延伸穿过第一半导体材料体的衬底。 测试系统具有集成在第一主体中并与第一通孔电耦合的第一电测试电路和由第一主体携带的电连接元件，用于电连接到外部; 第一电测试电路使得能够通过电连接元件检测第一通孔的至少一个电参数。

公开(公告)号：US20130027071A1

公开(公告)日：2013-01-31

申请号：US13558210

申请日：2012-07-25

Applicant: Roberto Canegallo ,  Mauro Scandiuzzo ,  Roberto Cardu ,  Eleonora Franchi Scarselli ,  Alberto Pagani

Inventor： Roberto Canegallo ,  Mauro Scandiuzzo ,  Roberto Cardu ,  Eleonora Franchi Scarselli ,  Alberto Pagani

IPC: G01R31/302

CPC classification number: G01R31/2889 ,  G01R31/3025

Abstract: A testing apparatus includes a tester and a probe card system that includes a probe card connected to the tester, and an active interposer connected to the probe card and wirelessly coupled with a device to be tested. The active interposer includes pads positioned on its free surface facing the device. The pads are positioned with respect to pads of the device so that each pad of the active interposer faces a pad of the device and is separated therefrom by a dielectric. Each pair of facing pads forms an elementary wireless coupling element which allows a wireless transmission between the active interposer and the device. The active interposer also includes an amplifier circuit configured to amplify wireless signals from the device before forwarding them to the tester. The probe card system includes a transmission element able to transmit a power voltage from the tester to the device.

Abstract translation: 测试装置包括测试器和探针卡系统，其包括连接到测试器的探针卡，以及连接到探针卡并与要测试的设备无线耦合的有源插入器。 有源插入器包括位于其面向设备的自由表面上的焊盘。 焊盘相对于器件的焊盘定位，使得有源插入器的每个焊盘面向器件的焊盘并且通过电介质与其分离。 每对相对的焊盘形成基本无线耦合元件，其允许在有源插入器和设备之间进行无线传输。 有源插入器还包括放大器电路，其被配置为在将它们转发到测试器之前放大来自器件的无线信号。 探针卡系统包括能够从测试仪向设备传输电力电压的传输元件。

公开(公告)号：US08358147B2

公开(公告)日：2013-01-22

申请号：US12982753

申请日：2010-12-30

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/02

CPC classification number: G01R31/31905 ,  G01R31/3172 ,  G01R31/31926

Abstract: A method of testing integrated circuits is provided. The method includes establishing at least one first physical communication channel between a test equipment and a respective group of integrated circuits under test by having probes of the test equipment contacting at least one corresponding physical contact terminal of each integrated circuit of the respective group. The method further includes having the test equipment exchanging, over the at least one first physical communication channel, the same test stimuli with each integrated circuit of the group. The method still further includes having each integrated circuit of the group establishing a corresponding second physical communication channel with the test equipment by having at least one physical contact terminal of the integrated circuit contacted by a corresponding probe of the test equipment. The method further includes having each integrated circuit of the group exchanging, over the second physical communication channel, a corresponding test response signal based on the received test stimuli with the test equipment. The test stimuli are exchanged by modulating at least one first carrier wave based on the test stimuli; the at least one first carrier wave has at least one first frequency. The test response signals of each integrated circuit of the group are exchanged by modulating at least one respective second carrier wave based on the test response signals; each second carrier wave have at least one respective second frequency.

Abstract translation: 提供了一种测试集成电路的方法。 该方法包括通过使测试设备的探针接触相应组的每个集成电路的至少一个对应的物理接触端，来建立测试设备与被测试的相应组的集成电路之间的至少一个第一物理通信信道。 所述方法还包括使所述测试设备在所述至少一个第一物理通信信道中与所述组的每个集成电路交换相同的测试刺激。 该方法还包括使该组的每个集成电路与测试设备建立相应的第二物理通信信道，其中该集成电路的至少一个物理接触端子与测试设备的相应探针接触。 该方法还包括使得该组的每个集成电路在第二物理通信信道上基于所接收的与测试设备的测试刺激相交换的测试响应信号。 通过基于测试刺激调制至少一个第一载波来交换测试刺激; 所述至少一个第一载波具有至少一个第一频率。 通过基于测试响应信号调制至少一个相应的第二载波来交换该组的每个集成电路的测试响应信号; 每个第二载波具有至少一个相应的第二频率。

公开(公告)号：US20120081137A1

公开(公告)日：2012-04-05

申请号：US13252895

申请日：2011-10-04

Applicant: Alberto Pagani ,  Jean-Michel Bard

Inventor： Alberto Pagani ,  Jean-Michel Bard

IPC: G01R31/00

CPC classification number: G06F11/26

Abstract: A testing method is described of at least one device provided with an integrated testing circuit and in communication with at least one tester where messages/instructions/test signals/information are exclusively sent from the tester to the device . A testing architecture is also described for implementing this testing method.

Abstract translation: 描述了至少一个设置有集成测试电路并且与至少一个测试器进行通信的测试方法，其中消息/指令/测试信号/信息从测试仪专门发送到设备。 还描述了用于实现该测试方法的测试架构。

公开(公告)号：US20110202799A1

公开(公告)日：2011-08-18

申请号：US13027617

申请日：2011-02-15

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G06F11/00

CPC classification number: G01R31/31908 ,  G01R31/3025 ,  G01R31/318572 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The disclosure relates to a process for making an electric testing of electronic devices DUT, of the type comprising the steps of: connecting at least one electronic device DUT to an automatic testing apparatus or ATE apparatus suitable for making the testing of digital circuits; sending, through said ATE apparatus, control signals for the electric testing to said electronic device DUT. Advantageously, the process also comprises the steps of: making the electric testing of said electronic device DUT through at least one reconfigurable digital interface RDI connected to said ATE apparatus through a dedicated digital communication channel and comprising a limited number of communication or connection lines strictly appointed to the exchange of the testing information; and sending from said electronic device DUT to said ATE apparatus response messages, if any, containing measures, failure information and data in response to said control signals and through said digital communication channel.

Abstract translation: 本公开涉及一种用于进行电子设备DUT的电测试的方法，其类型包括以下步骤：将至少一个电子设备DUT连接到适于进行数字电路测试的自动测试设备或ATE设备; 通过所述ATE装置向所述电子设备DUT发送用于电测试的控制信号。 有利地，该方法还包括以下步骤：通过专用数字通信信道通过至少一个可连接到所述ATE设备的可重构数字接口RDI进行所述电子设备DUT的电测试，并且包括有限数量的通信或连接线 交换测试信息; 以及响应于所述控制信号并通过所述数字通信信道，从所述电子设备DUT向所述ATE设备发送包含测量，故障信息和数据的响应消息（如果有的话）。