公开(公告)号：US20190276931A1

公开(公告)日：2019-09-12

申请号：US16296718

申请日：2019-03-08

Applicant: APPLIED MATERIALS, INC.

Inventor： Bencherki Mebarki ,  Anantha K. Subramani ,  Joung Joo Lee ,  Farzad Houshmand ,  Kelvin Chan ,  Kenneth Starks ,  Xianmin Tang

IPC: C23C14/54 ,  H01L21/02 ,  H01L21/285 ,  C23C14/50 ,  C23C14/34

Abstract: Methods and apparatus for physical vapor deposition are provided herein. In some embodiments, an apparatus for physical vapor deposition (PVD) includes: a linear PVD source to provide a stream of material flux comprising material to be deposited on a substrate; and a substrate support having a support surface to support the substrate at a non-perpendicular angle to the linear PVD source, wherein the substrate support and linear PVD source are movable with respect to each other along an axis that is perpendicular to a plane of the support surface of the substrate support sufficiently to cause the stream of material flux to move over a working surface of the substrate disposed on the substrate support during operation.

公开(公告)号：US10354882B2

公开(公告)日：2019-07-16

申请号：US15963451

申请日：2018-04-26

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Xianmin Tang ,  Sundar Ramamurthy ,  Jerome Machillot

IPC: H01L21/285 ,  H01L21/324

Abstract: Methods for forming a metal silicide film with low resistivity at low temperature are described. A metal silicide film is formed on a substrate surface and annealed at high pressure and low temperature.

公开(公告)号：US20180315609A1

公开(公告)日：2018-11-01

申请号：US15963451

申请日：2018-04-26

Applicant: Applied Materials, Inc.

Inventor： Bencherki Mebarki ,  Xianmin Tang ,  Sundar Ramamurthy ,  Jerome Machillot

IPC: H01L21/285 ,  H01L21/324

CPC classification number: H01L21/28518 ,  H01L21/2855 ,  H01L21/324

Abstract: Methods for forming a metal silicide film with low resistivity at low temperature are described. A metal silicide film is formed on a substrate surface and annealed at high pressure and low temperature.

公开(公告)号：US10109481B2

公开(公告)日：2018-10-23

申请号：US14410790

申请日：2013-07-01

Applicant: Applied Materials, Inc.

Inventor： Mingwei Zhu ,  Nag B. Patibandla ,  Rongjun Wang ,  Vivek Agrawal ,  Anantha Subramani ,  Daniel Lee Diehl ,  Xianmin Tang

IPC: H01L21/02 ,  H01L21/3065 ,  H01L21/322 ,  H01J37/34 ,  C23C14/00 ,  C23C14/06

Abstract: Embodiments of the invention described herein generally relate to an apparatus and methods for forming high quality buffer layers and Group III-V layers that are used to form a useful semiconductor device, such as a power device, light emitting diode (LED), laser diode (LD) or other useful device. Embodiments of the invention may also include an apparatus and methods for forming high quality buffer layers, Group III-V layers and electrode layers that are used to form a useful semiconductor device. In some embodiments, an apparatus and method includes the use of one or more cluster tools having one or more physical vapor deposition (PVD) chambers that are adapted to deposit a high quality aluminum nitride (AlN) buffer layer that has a high crystalline orientation on a surface of a plurality of substrates at the same time.

公开(公告)号：US10060024B2

公开(公告)日：2018-08-28

申请号：US15679480

申请日：2017-08-17

Applicant: Applied Materials, Inc.

Inventor： Zhendong Liu ,  Rongjun Wang ,  Xianmin Tang ,  Srinivas Gandikota ,  Tza-Jing Gung ,  Muhammad M. Rasheed

IPC: C23C14/34 ,  H01J37/34

CPC classification number: C23C14/3407 ,  H01J37/342 ,  H01J37/3423

Abstract: Target assemblies and PVD chambers including target assemblies are disclosed. The target assembly includes a target that has a concave shaped target. When used in a PVD chamber, the concave target provides more radially uniform deposition on a substrate disposed in the sputtering chamber.

公开(公告)号：US10043670B2

公开(公告)日：2018-08-07

申请号：US14981190

申请日：2015-12-28

Applicant: APPLIED MATERIALS, INC.

Inventor： Jothilingam Ramalingam ,  Thanh X. Nguyen ,  Zhiyong Wang ,  Jianxin Lei ,  Xianmin Tang

IPC: H01L21/285 ,  H01L21/326 ,  C23C14/18 ,  C23C14/34 ,  C23C14/35 ,  C23C14/56

Abstract: Systems and methods for sputtering a layer of refractory metal layer onto a barrier layer disposed on a substrate are disclosed herein. In one or more embodiments, a method of sputter depositing a tungsten structure in an integrated circuit includes: moving a substrate into a plasma processing chamber and onto a substrate support in opposition to a sputter target assembly comprising a tungsten target having no more than ten parts per million of carbon and no more than ten parts per million of oxygen present as impurities; flowing krypton into the plasma processing chamber; and exciting the krypton into a plasma to deposit, by sputtering, a tungsten film layer on a material layer of a substrate supported by the substrate support. In some embodiments, the target assembly further includes a titanium backing plate and an aluminum bonding layer disposed between the titanium backing plate and the tungsten target.

公开(公告)号：US09460959B1

公开(公告)日：2016-10-04

申请号：US14958459

申请日：2015-12-03

Applicant: APPLIED MATERIALS, INC.

Inventor： Xiangjin Xie ,  Feng Q. Liu ,  Daping Yao ,  Alexander Jansen ,  Joung Joo Lee ,  Adolph Miller Allen ,  Xianmin Tang ,  Mei Chang

IPC: B08B6/00 ,  H01L21/768 ,  B08B7/00 ,  B08B3/00 ,  B08B5/00 ,  B08B9/00 ,  B08B9/027

CPC classification number: H01L21/02068 ,  B08B3/00 ,  B08B3/106 ,  B08B5/00 ,  B08B7/0035 ,  B08B9/00 ,  B08B9/027 ,  C23G1/24 ,  F01D5/005 ,  F05D2230/90 ,  H01L21/02063 ,  H01L21/76814

Abstract: Methods for processing a substrate are provided herein. In some embodiments, method of processing a substrate includes: heating a substrate disposed within a processing volume of a substrate processing chamber to a temperature of up to about 400 degrees Celsius, wherein the substrate comprises a first surface, an opposing second surface, and an opening formed in the first surface and extending towards the opposing second surface, and wherein the second surface comprises a conductive material disposed in the second surface and aligned with the opening; and exposing the substrate to a process gas comprising about 80 to about 100 wt % of an alcohol to reduce a contaminated surface of the conductive material.

Abstract translation: 本文提供了处理基板的方法。 在一些实施例中，处理衬底的方法包括：将设置在衬底处理室的处理体积内的衬底加热到​​高达约400摄氏度的温度，其中衬底包括第一表面，相对的第二表面和 开口形成在第一表面中并且朝向相对的第二表面延伸，并且其中第二表面包括设置在第二表面中并与开口对准的导电材料; 以及将基底暴露于包含约80至约100重量％的醇的工艺气体中以减少导电材料的污染表面。

公开(公告)号：US20150155143A1

公开(公告)日：2015-06-04

申请号：US14618416

申请日：2015-02-10

Applicant: Applied Materials, Inc.

Inventor： John C. Forster ,  Xianmin Tang

IPC: H01J37/34 ,  B23K31/02 ,  B23K1/00

CPC classification number: H01J37/3491 ,  B23K1/0008 ,  B23K31/02 ,  C23C14/3407 ,  H01J37/3435 ,  H01J37/3441 ,  H01J2237/332 ,  Y10T29/49826 ,  Y10T29/49947

Abstract: Improved designs of target assemblies and darkspace shields are disclosed. Methods of improving darkspace gap in sputtering chambers and sputtering chambers having an improved darkspace gap are also disclosed. Disclosed is a target assembly having a substantially coplanar backing plate and a target are vertically spaced from the darkspace shield.

Abstract translation: 公开了改进的目标组件和暗区屏蔽的设计。 还公开了改善暗室间隙的溅射室和溅射室中的暗空隙的改进方法。 公开了一种目标组件，其具有基本上共面的背板，并且靶与暗空间屏蔽件垂直间隔开。

公开(公告)号：US12211743B2

公开(公告)日：2025-01-28

申请号：US17466732

申请日：2021-09-03

Applicant: Applied Materials, Inc.

Inventor： Ge Qu ,  Zhiyuan Wu ,  Feng Chen ,  Carmen Leal Cervantes ,  Yong Jin Kim ,  Kevin Kashefi ,  Xianmin Tang ,  Wenjing Xu ,  Lu Chen ,  Tae Hong Ha

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532

Abstract: Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

公开(公告)号：US20250022750A1

公开(公告)日：2025-01-16

申请号：US18753020

申请日：2024-06-25

Applicant: Applied Materials, Inc.

Inventor： Shinjae Hwang ,  Yoon Ah Shin ,  Feng Chen ,  Bencherki Mebarki ,  Joung Joo Lee ,  Xianmin Tang

IPC: H01L21/768

Abstract: Embodiments of the disclosure provide methods of forming interconnect structures in the manufacture of microelectronic devices. In one or more embodiments, microelectronic devices described herein comprise at least one top interconnect structure that is interconnected to at least one bottom interconnect structure. Embodiments of the disclosure relate to methods of improving barrier layer and metal liner properties in the interconnect structures without increasing capacitance and/or damaging other layers. In some embodiments, the barrier layer is treated with microwave radiation. The treatment process can be implemented in a processing tool including a modular high-frequency emission source.