公开(公告)号：US11245008B2

公开(公告)日：2022-02-08

申请号：US16642522

申请日：2019-07-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen Ma ,  Guangcai Yuan ,  Ce Ning ,  Hehe Hu ,  Xin Gu

IPC: H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  G01N27/414 ,  H01L29/786

Abstract: The present application provides a TFT, a manufacturing method thereof, and a sensor. The TFT includes a substrate, and a source, a drain and an active layer on the substrate. The active layer includes a microchannel, and the thin film transistor is configured to detect a sample in the microchannel. When a sample to be detected enters the microchannel, the electron distribution in the active layer would be affected, which causes fluctuations in the TFT characteristics. By detecting such fluctuations, detecting the composition and property of the liquid to be detected may be achieved. Moreover, by virtue of the microchannel, the sample may be precisely controlled. The impact of the external environment may be reduced and the detection accuracy can be enhanced. Continuous monitoring instead of one-time detection of the sample may be achieved and the sample detection efficiency may be improved.

公开(公告)号：US20210226064A1

公开(公告)日：2021-07-22

申请号：US16959179

申请日：2019-11-19

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaochen Ma ,  Guangcai Yuan ,  Ce Ning ,  Xin Gu ,  Hehe Hu

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417

Abstract: Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.

公开(公告)号：US20200091263A1

公开(公告)日：2020-03-19

申请号：US16556342

申请日：2019-08-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ke Wang ,  Xinhong Lu ,  Hehe Hu ,  Wei Yang ,  Ce Ning

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40

Abstract: The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.

公开(公告)号：US20180166562A1

公开(公告)日：2018-06-14

申请号：US15554446

申请日：2017-01-20

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ce Ning ,  Wei Yang ,  Hehe Hu

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/426 ,  H01L21/4757

CPC classification number: H01L29/66969 ,  H01L21/425 ,  H01L21/426 ,  H01L21/44 ,  H01L21/465 ,  H01L21/4757 ,  H01L21/47635 ,  H01L21/77 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869

Abstract: A thin film transistor, a manufacturing method for an array substrate, the array substrate, and a display device are provided. The manufacturing method for a thin film transistor includes: forming a semiconductor layer; performing a modification treatment on a surface layer of a region of the semiconductor layer, so that the region of the semiconductor layer has a portion in a first direction perpendicular to the semiconductor layer formed as an etching blocking layer, portions of the semiconductor layer on both sides of the etching blocking layer in a second direction parallel to a surface of the semiconductor layer remaining unmodified; and forming a source electrode and a drain electrode on the semiconductor layer, the source electrode and the drain electrode being formed on both sides of a center line of the region perpendicular to the second direction, and spaced from each other in the second direction.

公开(公告)号：US20240313007A1

公开(公告)日：2024-09-19

申请号：US18274897

申请日：2022-07-01

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xinhong Lu ,  Chunfang Zhang ,  Xiaoyan Zhu ,  Shuang Sun ,  Shuilang Dong ,  Jingshang Zhou ,  Qi Qi ,  Hehe Hu

IPC: H01L27/12 ,  H01L25/16

CPC classification number: H01L27/1248 ,  H01L27/1259 ,  H01L25/167

Abstract: A driving base plate includes a functional region (A) and a peripheral region (B) surrounding the functional region (A). Both the functional region (A) and the peripheral region (B) include a supporting substrate, and the functional region (A) further includes a flexible substrate and at least one protecting layer that are sequentially arranged on the supporting substrate. The region of the orthographic projection of the flexible substrate on the supporting substrate is located within the region where the supporting substrate within the functional region (A) is located, and the protecting layer covers the surface of the flexible substrate further from the supporting substrate and the side of the flexible substrate close to the peripheral region (B). The adhesive force between the flexible substrate and the supporting substrate of the driving base plate is increased, and the reliability of the products manufactured by using the driving base plate is improved.

公开(公告)号：US20240261785A1

公开(公告)日：2024-08-08

申请号：US18018795

申请日：2021-12-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feifei Li ,  Bolin Fan ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Nianqi Yao ,  Jiayu He ,  Jie Huang ,  Kun Zhao

IPC: B01L3/00

CPC classification number: B01L3/502761 ,  B01L2200/0647 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0848 ,  B01L2400/0415

Abstract: Provided is a micro-nano fluidic substrate, a chip, a preparation method, and a system. The micro-nano fluidic substrate includes: a base; an electrode layer located on the base, the electrode layer includes a first electrode, a second electrode, and a control electrode; and a film layer located on the electrode layer and far away from the base, the film layer includes a groove layer, a nano-channel and a micro-channel, the groove layer includes a first groove, the nano-channel is located in the first groove, an orthographic projection of the nano-channel on the base at least partially coincides with an orthographic projection of the control electrode on the base, and the micro-channel is in communication with the nano-channel, the micro-channel includes a first micro-channel and a second micro-channel, and the first micro-channel is in communication with the first electrode, the second micro-channel is in communication with the second electrode.

公开(公告)号：US20240243206A1

公开(公告)日：2024-07-18

申请号：US18686604

申请日：2021-08-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangcai Yuan ,  Lingyan Liang ,  Hongtao Cao ,  Fengjuan Liu ,  Ce Ning ,  Fei Wang ,  Hehe Hu ,  Xiaolong Wang

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1222 ,  H01L29/04 ,  H01L29/66742

Abstract: A thin film transistor; includes a substrate; and a semiconductor layer provided on the substrate. The semiconductor layer includes a first surface proximate to the substrate and a second surface away from the substrate, and the semiconductor layer is made of a metal oxide semiconductor material. The semiconductor layer has a channel region; and crystals of metal oxide semiconductor are formed at least in the channel region of the semiconductor layer and proximate to the first surface or the second surface.

公开(公告)号：US20240186379A1

公开(公告)日：2024-06-06

申请号：US17798347

申请日：2021-10-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hehe Hu ,  Fengjuan Liu ,  Guangcai Yuan ,  Jiayu He ,  Ce Ning ,  Zhengliang Li ,  Kun Zhao

IPC: H01L29/10 ,  H01L21/385 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/1041 ,  H01L21/385 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

Abstract: Provided is a method for manufacturing a metal-oxide thin-film transistor (TFT). The method includes: forming, on a base substrate, an active layer including a metal oxide semiconductor, and a functional layer laminated on the active layer and containing a lanthanide element; and annealing the active layer and the functional layer, such that the lanthanide element in the functional layer is diffused into the active layer.

公开(公告)号：US20230006070A1

公开(公告)日：2023-01-05

申请号：US17782035

申请日：2021-05-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jie Huang ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Jiayu He ,  Nianqi Yao ,  Kun Zhao ,  Feng Qu ,  Xiaochun Xu

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.

公开(公告)号：US11532686B2

公开(公告)日：2022-12-20

申请号：US16330719

申请日：2018-09-11

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xinhong Lu ,  Ke Wang ,  Hehe Hu ,  Ce Ning ,  Wei Yang

IPC: H01L29/78 ,  H01L27/32 ,  H01L29/786

Abstract: An array substrate includes a base substrate; a first thin film transistor on the base substrate and including a first active layer, a first gate electrode, a first source electrode and a first drain electrode; a second thin film transistor on the base substrate and including a second active layer, a second gate electrode, a second source electrode and a second drain electrode; a first gate insulating layer between the first active layer and the first gate electrode; and a second gate insulating layer between the second active layer and the second gate electrode, the second gate insulating layer being different from the first gate insulating layer. The first source electrode, the first drain electrode, and the second gate electrode are in a same layer. The first source electrode and the first drain electrode are on a side of the second gate insulating layer distal to the base substrate.