THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND DISPLAY SUBSTRATE

    公开(公告)号:US20240204004A1

    公开(公告)日:2024-06-20

    申请号:US17910133

    申请日:2021-12-27

    CPC classification number: H01L27/124 H01L27/1259 H01L27/1222

    Abstract: Provided are a thin-film transistor and a manufacturing method thereof, and a display substrate, belonging to the technical field of thin-film transistors. The thin-film transistor includes: a base substrate; a gate electrode on the base substrate; an active layer on a side of the gate electrode away from the base substrate, an orthographic projection of the active layer onto the base substrate overlapping with an orthographic projection of the gate electrode onto the base substrate; and a first electrode and a second electrode on a side of the active layer away from the base substrate, the first electrode being one of a source electrode and a drain electrode, and the second electrode being the other of the source electrode and the drain electrode. Specifically the active layer includes a channel region corresponding to a gap between the first electrode and the second electrode, and a width direction of the channel region is perpendicular or substantially perpendicular to an extending direction of the gate electrode. According to the embodiments of the present disclosure, the illumination stability of the thin-film transistor can be improved without reducing the transmittance of the substrate.

    DISPLAY BACKPLANE, METHOD OF MANUFACTURING THE SAME AND DISPLAY DEVICE USING THE SAME

    公开(公告)号:US20210167143A1

    公开(公告)日:2021-06-03

    申请号:US16835722

    申请日:2020-03-31

    Abstract: The disclosure provides a display backplane, a method of manufacturing the same, and a display device using the same. The display backplane includes a substrate; a thin film transistor structure layer disposed on one side of the substrate and including thin film transistors, a gate insulating layer, and an interlayer dielectric layer, where an etching rate of the interlayer dielectric layer carried out under an HF atmosphere condition is less than 2 Å/S; and photosensitive devices spaced apart from the thin film transistor structure layer and disposed on one side of the thin film transistor structure layer away from the substrate. The interlayer dielectric layer has a high compactness, and can effectively block H from entering the active layer of the thin film transistor to conductorize the active layer, thus guaranteeing good optical characteristics of the thin film transistor while carrying out optical compensation.

    ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY APPARATUS

    公开(公告)号:US20250151504A1

    公开(公告)日:2025-05-08

    申请号:US19017860

    申请日:2025-01-13

    Abstract: An array substrate includes a base substrate, a first conductive layer, a first electrode, an organic planarization layer and an organic active layer. The first conductive layer is provided on a side of the base substrate. The first electrode is provided on a side of the first conductive layer away from the base substrate, an orthographic projection of the first electrode on the base substrate overlapping an orthographic projection of the drain electrode on the base substrate. The organic planarization layer is provided on a side of the first electrode away from the base substrate, first via holes being provided in the organic planarization layer. The organic active layer is provided on a side of the organic planarization layer away from the base substrate, the organic active layer being connected to the source electrode by a first via hole and connected to the drain electrode by a first via hole.

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