公开(公告)号：US20120021804A1

公开(公告)日：2012-01-26

申请号：US13102598

申请日：2011-05-06

申请人： Feng Shi ,  Yu Sun

发明人： Feng Shi ,  Yu Sun

IPC分类号： H04W48/18 ,  H04W88/02

CPC分类号： H04W48/16 ,  H04W72/12 ,  H04W88/06

摘要： A method for solving conflict between network searching and mobile phone traffic of a multi-card multi-standby mobile phone is provided. The method comprises storing network searching information of a first user card and processing the mobile phone traffic of a second user card, when conflict occurs between the network searching of the first user card and the mobile phone traffic of the second user card, and continuing to perform the network searching according to the stored network searching information of the first user card after completing the mobile phone traffic, when processing time of the mobile phone traffic of the second user card is less than or equal to a time threshold value. A multi-card multi-standby mobile phone is provided too. The mobile phone comprises a RAM for storing the network searching information, a timer unit for measuring the processing time of mobile phone traffic, a comparing unit set with the time threshold value for comparing the processing time of the mobile phone traffic with the time threshold value, and a MCU for continuing to perform the network searching according to the stored network searching information of the first user card when the processing time of the mobile phone traffic is less than or equal to the time threshold value. The present invention promotes the efficiency of the network searching.

摘要翻译： 提供一种解决多卡多待机手机网络搜索与移动电话流量冲突的方法。 该方法包括存储第一用户卡的网络搜索信息并处理第二用户卡的移动电话业务，当第一用户卡的网络搜索与第二用户卡的移动电话业务之间发生冲突时， 在第二用户卡的移动电话业务的处理时间小于或等于时间阈值的情况下，在完成移动电话业务之后，根据所存储的第一用户卡的网络搜索信息执行网络搜索。 还提供了多卡多待机手机。 移动电话包括用于存储网络搜索信息的RAM，用于测量移动电话业务的处理时间的定时器单元，设置有用于将移动电话业务的处理时间与时间阈值进行比较的时间阈值的比较单元 以及MCU，用于当移动电话业务的处理时间小于或等于时间阈值时，根据所存储的第一用户卡的网络搜索信息继续执行网络搜索。 本发明提高了网络搜索的效率。

公开(公告)号：US20100207411A1

公开(公告)日：2010-08-19

申请号：US12305468

申请日：2007-06-21

申请人： Yu Sun ,  Keekyoung Kim

发明人： Yu Sun ,  Keekyoung Kim

IPC分类号： B81B7/02 ,  B25J7/00 ,  B81B3/00 ,  H01R43/00

CPC分类号： B81C99/002 ,  B25J9/104 ,  B81B2201/0292 ,  B81B2201/031 ,  B81B2201/033

摘要： The present invention relates to a design and microfabrication method for microgrippers that are capable of grasping micro and nano objects of a large range of sizes and two-axis force sensing capabilities. Gripping motion is produced by one or more electrothermal actuators. Integrated force sensors along x and y directions enable the measurement of gripping forces as well as the forces applied at the end of microgripper arms along the normal direction, both with a resolution down to nanoNewton. The microfabrication method enables monolithic integration of the actuators and the force sensors.

摘要翻译： 本发明涉及一种微抓爪的设计和微细加工方法，其能够抓住大范围尺寸和双轴力感测能力的微型和纳米物体。 夹持运动由一个或多个电热致动器产生。 沿x和y方向的集成力传感器可以测量夹紧力以及沿着法向方向施加在微夹臂末端的力，并且分辨率低至纳摩顿。 微加工方法可实现致动器和力传感器的整体集成。

公开(公告)号：US20100128521A1

公开(公告)日：2010-05-27

申请号：US12275663

申请日：2008-11-21

申请人： Yuji Mizuguchi ,  Mark W. Randolph ,  Darlene Gay Hamilton ,  Yi He ,  Zhizheng Liu ,  Yanxia (Emma) Lin ,  Xianmin Yi ,  Gulzar Kathawala ,  Amol Ramesh Joshi ,  Kuo-Tung Chang ,  Edward Franklin Runnion ,  Sung-Chul Lee ,  Sung-Yong Chung ,  Yanxiang Liu ,  Yu Sun

发明人： Yuji Mizuguchi ,  Mark W. Randolph ,  Darlene Gay Hamilton ,  Yi He ,  Zhizheng Liu ,  Yanxia (Emma) Lin ,  Xianmin Yi ,  Gulzar Kathawala ,  Amol Ramesh Joshi ,  Kuo-Tung Chang ,  Edward Franklin Runnion ,  Sung-Chul Lee ,  Sung-Yong Chung ,  Yanxiang Liu ,  Yu Sun

IPC分类号： G11C16/04

CPC分类号： G11C16/26 ,  G11C16/08 ,  G11C16/3427

摘要： Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.

摘要翻译： 提出了有助于将预定义的负栅极电压施加到与在读取或验证操作期间选择的存储器单元相关联的所选字线相邻的字线的系统，方法和设备，以便于减少相邻字线干扰。 存储器组件可以包括优化的操作部件，其可以至少部分地基于预定义的操作标准，将预定义的负栅极电压施加到与被选择用于读取或验证操作所选择的存储器单元相关联的所选字线相邻的字线上，以便减少 所选择的存储单元中的相邻字线干扰，以便减少电压阈值的移位并保持期望的操作窗口。 优化的操作组件可选地可以包括评估器组件，其可以便于确定施加到相邻字线的负栅极电压是否被调整以便于将相邻字线干扰降低到低于预定阈值量。

公开(公告)号：US07712366B2

公开(公告)日：2010-05-11

申请号：US11628899

申请日：2005-05-27

申请人： Felix Beyeler ,  Bradley J. Nelson ,  Yu Sun

发明人： Felix Beyeler ,  Bradley J. Nelson ,  Yu Sun

IPC分类号： G01P15/125

CPC分类号： G01P15/125 ,  G01P15/0802 ,  G01P15/0888 ,  G01P15/18

摘要： A capacitive transducer a first part containing a first set of capacitor plates and a second part relatively movable in a plane to the first part. The second part contains a second set of capacitor plates. Both sets of capacitor plates are built on a substrate, wherein the capacitor plates form a plurality of capacitors. The second part is relatively movable in all six degrees of freedom. One set of the plurality of capacitors measures displacements in a plane and a second set of the plurality capacitors measures displacements perpendicular to the plane.

摘要翻译： 电容换能器，第一部分包含第一组电容器板和可在平面中相对移动到第一部分的第二部分。 第二部分包含第二组电容器板。 两组电容器板构建在基板上，其中电容器板形成多个电容器。 第二部分在所有六个自由度上相对移动。 一组多个电容器测量平面中的位移，并且多个电容器的第二组测量垂直于该平面的位移。

公开(公告)号：US07679851B1

公开(公告)日：2010-03-16

申请号：US11122838

申请日：2005-05-05

申请人： Yu Sun ,  Don Brunnett ,  Lin Guo

发明人： Yu Sun ,  Don Brunnett ,  Lin Guo

IPC分类号： G11B5/09

CPC分类号： G11B5/59616 ,  G11B5/012

摘要： Methods and structure for switching heads on a multiple recording surface disk drive that uses bi-directional radial writing toward a zipper zone at a middle diameter. When switching from a first head to a second head, features and aspects hereof assure that the second head will not be positioned in the zipper zone of the corresponding second surface and hence will not lose track following servo synchronization and control. In one aspect, added buffer or guard tracks having valid servo information but no data are added on either side of the zipper zone to assure that under the worst-case misalignment of surfaces the second head will not be positioned in its corresponding zipper zone when switching from the first head.

摘要翻译： 在多个记录表面磁盘驱动器上切换磁头的方法和结构，其使用向中间直径的拉链区域进行双向径向书写。 当从第一头切换到第二头部时，其特征和方面确保第二头部不会被定位在相应的第二表面的拉链区域中，因此在伺服同步和控制之后不会失去跟踪。 在一个方面，在拉链区域的任一侧添加了具有有效的伺服信息而没有数据的附加的缓冲器或保护轨道，以确保在最差的表面未对准的情况下，当切换时，第二头部将不位于相应的拉链区域 从第一个头。

公开(公告)号：US07643239B2

公开(公告)日：2010-01-05

申请号：US11789680

申请日：2007-04-25

申请人： Yu Sun ,  Xiaoping Hu

发明人： Yu Sun ,  Xiaoping Hu

IPC分类号： G11B21/02 ,  G11B5/596

CPC分类号： G11B5/59627 ,  G11B5/59633 ,  G11B5/59666

摘要： Embodiments of the present invention reduce the written-in run-out in servo data written to a storage medium. A set of servo controllers are evaluated and the controller having the best expected performance among the set is selected and employed. One embodiment of the present invention is a servo controller configured to select and employ a controller having a least amount of expected written-in run-out among a set of controllers. Another embodiment of the present invention is a method comprising a step for applying a set of controllers; and selecting a controller from the set of controllers with a least expected amount of written-in run out. Another embodiment of the present invention is a system comprising a servo controller for employing and selecting a disk controller that has a least expected amount of written-in run-out among a set of controllers.

摘要翻译： 本发明的实施例减少写入存储介质的伺服数据的写入跳动。 评估一组伺服控制器，并选择并采用具有最佳预期性能的控制器。 本发明的一个实施例是一种伺服控制器，被配置为在一组控制器中选择和使用具有最少量的预期写入跳动的控制器。 本发明的另一实施例是一种方法，包括：应用一组控制器的步骤; 以及从所述一组控制器中选择具有最少预期的写入用完量的控制器。 本发明的另一实施例是一种包括伺服控制器的系统，该伺服控制器用于采用和选择在一组控制器中具有最少预期的写入跳动量的磁盘控制器。

公开(公告)号：US07632749B1

公开(公告)日：2009-12-15

申请号：US10823970

申请日：2004-04-13

申请人： Hiroyuki Ogawa ,  Yider Wu ,  Nian Yang ,  Kuo-Tung Chang ,  Yu Sun

发明人： Hiroyuki Ogawa ,  Yider Wu ,  Nian Yang ,  Kuo-Tung Chang ,  Yu Sun

IPC分类号： H01L21/44

CPC分类号： H01L21/76816 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/05093 ,  H01L2224/05095 ,  H01L2224/05096 ,  H01L2224/05554 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/14

摘要： A semiconductor device is disclosed and provided. The semiconductor device includes a pad metal layer having a perimeter area and a center area. Further, the semiconductor device has a lower metal layer having a plurality of apertures below the center area of the pad metal layer. Moreover, an interlayer dielectric is formed between the pad metal layer and the lower metal layer. In an embodiment, the semiconductor device also includes a plurality of vias formed in the interlayer dielectric. The vias electrically couple the pad metal layer and the lower metal layer. Additionally, the vias are located below the perimeter area of the pad metal layer.

摘要翻译： 公开并提供了半导体器件。 半导体器件包括具有周边区域和中心区域的焊盘金属层。 此外，半导体器件具有在焊盘金属层的中心区域下方具有多个孔的下部金属层。 此外，在焊盘金属层和下金属层之间形成层间电介质。 在一个实施例中，半导体器件还包括形成在层间电介质中的多个通孔。 通孔电连接焊盘金属层和下部金属层。 另外，通孔位于垫金属层的周边区域的下方。

公开(公告)号：US20090290263A1

公开(公告)日：2009-11-26

申请号：US12153618

申请日：2008-05-21

申请人： MingGao Yao ,  Yu Sun

发明人： MingGao Yao ,  Yu Sun

IPC分类号： G11B5/56 ,  B32B38/10

CPC分类号： G11B5/5552 ,  Y10T29/42

摘要： A piezoelectric element comprises a first laminated structure body and a second laminated structure body. Side surfaces of the first and the second laminated structure bodies that are parallel to a laminating direction both have at least a portion etched to form a recess so that a step distance is formed between sides of the two adjacent electrode layers that are parallel to the laminating direction. The design of the step distance of the present invention increases insulation resistance between the two adjacent electrode layers on the opposite surfaces of the piezoelectric layer, lowers reject rate, and reduce manufacture cost. The first and the second laminated structure bodies are symmetrically laminated and bonded together, thus optimizing force balancing performance. The recess of the first and second laminated structure body may be filled with insulation resin, which also increases insulation resistance between the two adjacent electrode layers of the piezoelectric layer. The present invention also discloses a method of manufacturing a PZT element, a HGA with the PZT element and a disk drive unit having such HGA.

摘要翻译： 压电元件包括​​第一层叠结构体和第二层叠结构体。 与层叠方向平行的第一层叠结构体和第二层叠结构体的侧面均具有至少一部分被蚀刻以形成凹部，从而在平行于层叠的两个相邻的电极层的侧面之间形成台阶距离 方向。 本发明的台阶距离的设计提高了在压电层的相对表面上的两个相邻电极层之间的绝缘电阻，降低了废品率，并降低了制造成本。 第一和第二层压结构体对称地层压在一起，从而优化力平衡性能。 第一和第二层叠结构体的凹部可以填充绝缘树脂，这也增加了压电层的两个相邻电极层之间的绝缘电阻。 本发明还公开了一种制造PZT元件的方法，具有PZT元件的HGA和具有这种HGA的盘驱动单元。

公开(公告)号：US07619846B2

公开(公告)日：2009-11-17

申请号：US11750767

申请日：2007-05-18

申请人： Stan Shepherd ,  S. Craig Smith ,  Yu Sun

发明人： Stan Shepherd ,  S. Craig Smith ,  Yu Sun

IPC分类号： G11B21/02

CPC分类号： G11B5/59644

摘要： An apparatus and method for servo writing are disclosed. The method includes writing of first servo data to a medium, detecting a velocity integrated position of the first servo data, and writing second servo data in relation to the detected position of the first servo data.

摘要翻译： 公开了一种用于伺服写入的装置和方法。 该方法包括将第一伺服数据写入介质，检测第一伺服数据的速度积分位置，以及相对于检测到的第一伺服数据的位置写入第二伺服数据。

公开(公告)号：US20090256242A1

公开(公告)日：2009-10-15

申请号：US12102488

申请日：2008-04-14

申请人： Suketu Arun Parikh ,  Olov B. Karlsson ,  Yu Sun ,  Shankar Sinha ,  Timothy Thurgate

发明人： Suketu Arun Parikh ,  Olov B. Karlsson ,  Yu Sun ,  Shankar Sinha ,  Timothy Thurgate

IPC分类号： H01L21/425 ,  H01L23/58

CPC分类号： H01L27/11568 ,  H01L21/26586 ,  H01L27/115 ,  H01L29/1041 ,  H01L29/66666 ,  H01L29/7827

摘要： A method of forming an electronic device including forming a first trench in a workpiece including a substrate, the first trench having side walls and a bottom surface extending for a width between the side walls and forming a charge-storage layer along the side walls and bottom surface of the first trench. The method further includes implanting ions within the substrate underlying the bottom surface of the first trench to form an implant region and annealing the implant region, wherein after annealing, the implant region extends the width of the bottom surface and along a portion of the side walls.

摘要翻译： 一种形成电子器件的方法，包括在包括衬底的工件中形成第一沟槽，所述第一沟槽具有侧壁和在所述侧壁之间延伸宽度的底表面，并且沿着所述侧壁和底部形成电荷存储层 第一沟槽的表面。 该方法还包括在第一沟槽的底表面下方的衬底内注入离子以形成植入区域并退火植入区域，其中在退火之后，植入区域延伸底表面的宽度并沿着侧壁的一部分 。