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    LOW TEMPERATURE POLYCRYSTALLINE SILICON TFT ARRAY SUBSTRATE AND METHOD OF PRODUCING THE SAME, DISPLAY APPARATUS
    11.
    发明申请
    LOW TEMPERATURE POLYCRYSTALLINE SILICON TFT ARRAY SUBSTRATE AND METHOD OF PRODUCING THE SAME, DISPLAY APPARATUS 有权
    低温多晶硅晶体管阵列基板及其制造方法，显示装置

    公开(公告)号：US20160268319A1

    公开(公告)日：2016-09-15

    申请号：US14769891

    申请日：2014-09-30

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Chunping Long ,  Yinan Liang ,  Zheng Liu ,  Zuqiang Wang ,  Xueyan Tian

    IPC: H01L27/12 ,  H01L29/786

    CPC classification number: H01L27/1288 ,  H01L27/1255 ,  H01L27/3262 ,  H01L2227/323

    Abstract: The present disclosure provides a low temperature polycrystalline silicon field effect TFT array substrate and a method for producing the same and a display apparatus. The method: using a stepped photo resist process to form a polycrystalline silicon active layer and a lower polar plate of a polycrystalline silicon storage capacitor simultaneously on a substrate in one lithographic process; forming a gate insulation layer on the polycrystalline silicon active layer and the lower polar plate of the polycrystalline silicon storage capacitor; forming a metal layer on the gate insulation layer and etching the metal layer to form a gate electrode and gate lines connected with the gate electrode, a source electrode, a drain electrode and data lines connected with the source electrode and the drain electrode; forming a passivation layer, a photo resist layer and a pixel electrode layer in sequence and patterning the passivation layer, the photo resist layer and the pixel electrode layer to form patterns of an interlayer insulation layer via hole and a pixel electrode in one lithographic process; forming a pixel definition layer on the pixel electrode. The present disclosure may reduce times of lithographic processes for the low temperature polycrystalline silicon field effect TFT array substrate, improve the yield and reduce the costs.

    Abstract translation: 本公开内容提供了一种低温多晶硅场效应TFT阵列基板及其制造方法和显示装置。 该方法：在一个光刻工艺中，使用阶梯式光刻胶工艺在衬底上同时形成多晶硅存储电容器的多晶硅有源层和下极板; 在多晶硅有源层和多晶硅储存电容器的下极板上形成栅极绝缘层; 在所述栅极绝缘层上形成金属层，并蚀刻所述金属层以形成与所述栅电极，源电极，漏电极以及与所述源电极和所述漏极连接的数据线连接的栅电极和栅极线; 依次形成钝化层，光致抗蚀剂层和像素电极层，并在一个光刻工艺中图案化钝化层，光致抗蚀剂层和像素电极层以形成层间绝缘层通孔和像素电极的图案; 在像素电极上形成像素定义层。 本公开可以减少低温多晶硅场效应晶体管阵列基板的光刻工艺的时间，提高产量并降低成本。

    DISPLAY PANEL AND MIRROR DISPLAY APPARATUS
    13.
    发明申请
    DISPLAY PANEL AND MIRROR DISPLAY APPARATUS 有权

    公开(公告)号：US20210408489A1

    公开(公告)日：2021-12-30

    申请号：US17352491

    申请日：2021-06-21

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xueyan Tian ,  Xinshe Yin ,  Wenxiu Zhu ,  Guoyi Cui

    IPC: H01L51/52 ,  H01L27/32

    Abstract: The present disclosure provides a display panel and a mirror display apparatus. The display panel includes a base substrate, a pixel defining layer and a light adjusting layer. The pixel defining layer is disposed on the base substrate and defines a plurality of light-emitting areas. The light adjusting layer includes a first reflecting layer, which is disposed at a side of the pixel defining layer away from the base substrate and has first openings in areas corresponding to the light-emitting areas. The light adjusting layer is configured to block at least a part of light directed at adjacent light-emitting areas for each of the light-emitting areas.

    Thin film transistor, method for manufacturing the same, and display device
    15.
    发明授权
    Thin film transistor, method for manufacturing the same, and display device 有权

    公开(公告)号：US10770595B2

    公开(公告)日：2020-09-08

    申请号：US16427743

    申请日：2019-05-31

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xueyan Tian ,  Zunqing Song ,  Xiaolong Li

    IPC: H01L29/786 ,  H01L29/66 ,  H01L21/324 ,  H01L27/12

    Abstract: A thin film transistor, a method for manufacturing the same and a display device are provided in the present disclosure. The thin film transistor includes an active layer, a first electrode and a second electrode, and a gate electrode. The active layer includes an active layer body and an electrode hole in a center of the active layer body. The gate electrode is insulated and spaced apart from the active layer body and is disposed to surround the electrode hole. The first electrode and the second electrode are insulated from each other, both coupled to the active layer body, and insulated and spaced apart from the gate electrode. At least a portion of an orthographic projection of the first electrode on the active layer is within the electrode hole. An orthographic projection of the second electrode on the active layer surrounds the active layer body.

    Thin film transistor sensor and manufacturing method thereof
    16.
    发明授权
    Thin film transistor sensor and manufacturing method thereof 有权

    公开(公告)号：US10600976B2

    公开(公告)日：2020-03-24

    申请号：US15527823

    申请日：2016-06-16

    Applicant: BOE Technology Group Co., Ltd.

    Inventor： Xueyan Tian

    IPC: H01L29/786 ,  H01L51/05 ,  H01L51/10 ,  G01L1/16 ,  H01L51/00

    Abstract: Provided are a thin film transistor sensor and a manufacturing method thereof. The thin film transistor sensor includes a first substrate and a second substrate opposite to each other, the first substrate includes a first flexible base substrate and a first gate electrode disposed on the first flexible base substrate, and the second substrate includes a second flexible base substrate and a second gate electrode disposed on the second flexible base substrate; the second gate electrode is at least partially overlapped with and separated from the first gate electrode, and configured to be electrically connected to the first gate electrode after the thin film transistor sensor is applied with a voltage, such that the thin film transistor sensor is turned on.

    Piezoelectric sensors and methods for manufacturing the same
    17.
    发明授权
    Piezoelectric sensors and methods for manufacturing the same 有权

    公开(公告)号：US10461240B2

    公开(公告)日：2019-10-29

    申请号：US15567965

    申请日：2017-03-22

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xueyan Tian

    IPC: H01L41/107 ,  H01L41/04 ,  H01L41/113 ,  G01L1/16 ,  H01L41/047 ,  H01L41/193 ,  H01L41/27 ,  H01L51/05 ,  H01L41/08 ,  H01L41/311 ,  H01L51/00 ,  H01L51/10

    Abstract: The present disclosure discloses a piezoelectric sensor and a method for manufacturing the same to realize omni-directional pressure sensing. The piezoelectric sensor according to the present disclosure comprises a first electrode layer, a second electrode layer and a piezoelectric thin film layer between the first electrode layer and the second electrode layer, the piezoelectric sensor further comprising: a first functional module and a second functional module, both of which are connected to the second electrode layer, wherein the first functional module is configured to sense a pressure applied to the piezoelectric sensor in a first direction, and the second functional module is configured to sense a pressure applied to the piezoelectric sensor in a second direction, the first direction and the second direction are perpendicular to each other.

    Manufacturing method of low temperature polysilicon, low temperature polysilicon film and thin film transistor
    18.
    发明授权
    Manufacturing method of low temperature polysilicon, low temperature polysilicon film and thin film transistor 有权
    低温多晶硅，低温多晶硅薄膜和薄膜晶体管的制造方法

    公开(公告)号：US09299808B2

    公开(公告)日：2016-03-29

    申请号：US14349583

    申请日：2013-10-22

    Applicant: BOE TECHNOLOGY GROUP CO., LTD.

    Inventor： Xueyan Tian

    IPC: H01L29/66 ,  H01L21/02 ,  H01L21/268 ,  H01L29/786 ,  H01L27/12 ,  H01L21/324 ,  H01L27/32 ,  H01L29/04

    CPC classification number: H01L29/6675 ,  H01L21/02164 ,  H01L21/02422 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02667 ,  H01L21/02686 ,  H01L21/268 ,  H01L21/324 ,  H01L27/1285 ,  H01L27/3244 ,  H01L29/04 ,  H01L29/78603 ,  H01L29/78672

    Abstract: A method of manufacturing low temperature polysilicon is provided, comprising: depositing a buffer layer (20) on a base substrate (10); depositing an amorphous silicon layer (30) on the buffer layer; performing a heat treatment after forming the amorphous silicon layer; and dividing the amorphous silicon layer into a plurality of areas for laser annealing according to a thickness distribution of the amorphous silicon layer to form a polycrystalline silicon layer. A low temperature polysilicon film manufactured by the low temperature polysilicon manufacturing method and a thin film transistor having the film are also provided. The method realizes large grain size for polysilicons in each area of the amorphous silicon layer and a uniform distribution of polysilicon grain size across the entire substrate.

    Abstract translation: 提供一种制造低温多晶硅的方法，包括：在基底（10）上沉积缓冲层（20）; 在所述缓冲层上沉积非晶硅层（30）; 在形成非晶硅层之后进行热处理; 根据非晶硅层的厚度分布，将非晶硅层分割为多个激光退火区域，形成多晶硅层。 还提供了通过低温多晶硅制造方法制造的低温多晶硅膜和具有该膜的薄膜晶体管。 该方法在非晶硅层的每个区域中对于多晶硅实现了大的晶粒尺寸，并且在整个衬底上均匀分布了多晶硅晶粒尺寸。

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