DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    11.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    显示面板及其制造方法

    公开(公告)号:US20090212290A1

    公开(公告)日:2009-08-27

    申请号:US12354115

    申请日:2009-01-15

    IPC分类号: H01L27/088 H01L21/77

    摘要: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译: 显示面板包括: 下栅极线,基本上垂直于下栅极线设置的下数据线,连接到下栅极线和下数据线的薄膜晶体管(“TFT”),设置在下栅极线上的绝缘层, 下数据线和TFT,并且具有暴露下栅极线和下数据线的多个沟槽,设置在下栅极线上的沟槽中的上栅极线,设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    TFT ARRAY PANEL
    12.
    发明申请
    TFT ARRAY PANEL 有权
    TFT阵列面板

    公开(公告)号:US20090163022A1

    公开(公告)日:2009-06-25

    申请号:US12369839

    申请日:2009-02-12

    IPC分类号: H01L21/4763

    摘要: Multi-layered wiring for a larger flat panel display is formed by depositing molybdenum on a substrate in presence of a precursor gas containing at least one oxygen, nitrogen and carbon to form a molybdenum layer. An aluminum layer is deposited on the molybdenum layer. Another metal layer may be formed on the aluminum layer. The molybdenum layer has a face-centered cubic (FCC) lattice structure with a preferred orientation of (111).

    摘要翻译: 在含有至少一个氧,氮和碳的前体气体的存在下,在基板上沉积钼以形成钼层,形成用于较大平板显示器的多层布线。 铝层沉积在钼层上。 可以在铝层上形成另一金属层。 钼层具有面心立方(FCC)晶格结构,其优选取向为(111)。

    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    14.
    发明申请
    DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME 失效
    显示面板及其制造方法

    公开(公告)号:US20120228619A1

    公开(公告)日:2012-09-13

    申请号:US13472716

    申请日:2012-05-16

    IPC分类号: H01L29/786 H01L33/08

    摘要: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.

    摘要翻译: 显示面板包括: 下栅极线,基本上垂直于下栅极线设置的下数据线,连接到下栅极线和下数据线的薄膜晶体管(“TFT”),设置在下栅极线上的绝缘层, 下数据线和TFT,并且具有暴露下栅极线和下数据线的多个沟槽,设置在下栅极线上的沟槽中的上栅极线,设置在下数据上的沟槽中的上数据线 线和与TFT连接的像素电极。

    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME
    15.
    发明申请
    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20100148169A1

    公开(公告)日:2010-06-17

    申请号:US12498816

    申请日:2009-07-07

    IPC分类号: H01L29/786 H01L21/336

    摘要: A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material.

    摘要翻译: 薄膜晶体管(TFT)基板具有改善的电性能和减少的外观缺陷以及制造TFT基板的方法。 TFT基板包括:形成在绝缘基板的表面上的栅极布线; 氧化物活性层图案,其形成在栅极布线上并且包括第一材料的氧化物; 缓冲层图案,其设置在所述氧化物活性层图案上以直接接触所述氧化物活性层图案并且包括第二材料; 以及形成在所述缓冲层图案上以绝缘地穿过所述栅极布线的数据布线,其中所述第一材料的氧化物的吉布斯自由能低于所述第二材料的氧化物的吉布斯自由能。

    THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE
    16.
    发明申请
    THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE 有权
    薄膜晶体管,具有薄膜晶体管的阵列基板和制造阵列基板的方法

    公开(公告)号:US20080308826A1

    公开(公告)日:2008-12-18

    申请号:US11930502

    申请日:2007-10-31

    IPC分类号: H01L29/78 H01L21/02

    摘要: A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.

    摘要翻译: 薄膜晶体管包括半导体图案,源极和漏极以及栅极,半导体图案形成在基底基板上,半导体图案包括金属氧化物。 源极和漏极形成在半导体图案上,使得源极和漏极彼此间隔开,并且源极和漏极的轮廓与半导体图案的轮廓基本相同。 栅电极设置在源电极和漏电极之间的区域中,使得栅电极的一部分与源电极和漏电极重叠。 因此,由光引起的漏电流最小化。 结果,增强了薄膜晶体管的特性,减少了后图像以提高显示质量,并且提高了制造工艺的稳定性。

    TFT SUBSTRATE FOR LIQUID CRYSTAL DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
    17.
    发明申请
    TFT SUBSTRATE FOR LIQUID CRYSTAL DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME 审中-公开
    用于液晶显示装置的TFT基板及其制造方法

    公开(公告)号:US20080044963A1

    公开(公告)日:2008-02-21

    申请号:US11923822

    申请日:2007-10-25

    IPC分类号: H01L21/84

    摘要: There are provided a TFT substrate for an LCD apparatus and a method of manufacturing the same. A substrate (10), a diffusion barrier layer (11) and a copper alloy layer (12) are formed on the TET substrate, consecutively. The copper alloy includes a material from about 0.5 at % to about 15 at % to form a gate wiring layer. The material is used to form the diffusion barrier layer (11). A compound that comprises a material such as Zr, Ti, Hf, V, Ta, Ni, Cr, Nb, Co, Mn, Mo, W, Rh, Pd, Pt, etc. is deposited on the diffusion barrier layer (11) to a thickness from about 50 Å to about 5,000 Å. The deposited compound is then heat treated to convert the deposited compound into a silicide compound (11b). The transistor substrate has low resistance and high conductance. Also, etching process is simplified, and a mutual diffusion is prevented by means of the thin diffusion barrier layer.

    摘要翻译: 提供了一种用于LCD装置的TFT基板及其制造方法。 在TET基板上连续形成基板(10),扩散阻挡层(11)和铜合金层(12)。 铜合金包括约0.5at%至约15at%的材料以形成栅极布线层。 该材料用于形成扩散阻挡层(11)。 包含诸如Zr,Ti,Hf,V,Ta,Ni,Cr,Nb,Co,Mn,Mo,W,Rh,Pd,Pt等材料的化合物沉积在扩散阻挡层(11)上, 至约50至约5000的厚度。 然后将沉积的化合物进行热处理以将沉积的化合物转化为硅化物(11b)。 晶体管衬底具有低电阻和高电导率。 此外,简化了蚀刻工艺,并且通过薄的扩散阻挡层来防止相互扩散。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    19.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 失效
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20120315731A1

    公开(公告)日:2012-12-13

    申请号:US13523767

    申请日:2012-06-14

    IPC分类号: H01L21/336

    摘要: A thin film transistor array panel is provided, which includes a plurality of gate line, a plurality of common electrodes, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer, a plurality of drain electrodes formed on the semiconductor layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn is not produced on the surfaces of the common electrode.

    摘要翻译: 提供薄膜晶体管阵列面板,其包括多个栅极线,多个公共电极,覆盖栅极线和公共电极的栅极绝缘层,形成在栅极绝缘层上的多个半导体层,多个 包括多个源电极并形成在半导体层上的数据线,形成在半导体层上的多个漏电极以及与公共电极重叠并连接到漏电极的多个像素电极。 由于公共电极由ITON,IZON或者-IONON制成,或者是将双重层的ITO / ITON,IZO / IZON或者a-ITO / a-ITON,当注入H 2或SiH 4以形成氮化硅时 SiNX)层,在公共电极的表面上不产生不透明金属Sn或Zn。